• ETRI Journal
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• v.36 no.3
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• pp.367-373
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• 2014

With high bandwidth, low interference, and low power consumption, optical network-on-chip (ONoC) has emerged as a highly efficient interconnection for the future generation of multicore system on chips. In this paper, we propose a new path-setup method for ONoC to mitigate contentions, such as packets, by recycling the setup packet halfway to the destination. A new, strictly non-blocking $6{\times}6$ optical router is designed to support the new method. The simulation results show the new path-setup method increases the throughput by 52.03%, 41.94%, and 36.47% under uniform, hotspot-I, and hotspot-II traffic patterns, respectively. The end-to-end delay performance is also improved.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.8
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• pp.25-32
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• 2011

Networks-on-chip (NoC) is emerging as a key technology to overcome severe bus traffics in ever-increasing complexity of the Multiprocessor systems-on-chip (MPSoC); however traditional electrical interconnection based NoC architecture would be faced with technical limits of bandwidth and power consumptions in the near future. In order to cope with these problems, a hybrid optical NoC architecture which use both electrical interconnects and optical interconnects together, has been widely investigated. In the hybrid optical NoCs, wormhole switching and simple deterministic X-Y routing are used for the electrical interconnections which is responsible for the setup of routing path and optical router to transmit optical data through optical interconnects. Optical NoC uses circuit switching method to send payload data by preset paths and routers. However, conventional hybrid optical NoC has a drawback that concurrent transmissions are not allowed. Therefore, performance improvement is limited. In this paper, we propose a new routing algorithm that uses circuit switching and adaptive algorithm for the electrical interconnections to transmit data using multiple paths simultaneously. We also propose an efficient method to prevent livelock problems. Experimental results show up to 60% throughput improvement compared to a hybrid optical NoC and 65% power reduction compared to an electrical NoC.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.83-93
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• 2014

It is a widespread concern that electrical interconnection based network-on-chip (NoC) will ultimately face the limitation in communication bandwidth, transmission latency and power consumption in the near future. With the development of silicon photonics technology, a hybrid optical network-on-chip (HONoC) which embraces both electrical- and optical interconnect, is emerging as a promising solution to overcome these problems. Today's leading edge systems-on-chips (SoCs) comprise heterogeneous many-cores for higher energy efficiency, therefore, extended study beyond regular topology based NoC is required. This paper proposes an energy and latency optimization topology design technique for HONoC taking into account the traffic characteristics of target applications. The proposed technique is implemented with genetic algorithm and simulation results show the reduction by 13.84% in power loss and 28.14% in average latency, respectively.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.23 no.6
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• pp.609-617
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• 2014

We have studied a chip-on-board LED lighting optical system for various luminous-intensity-distribution angles of the LED. An optical system that can accept different LEDs was made to reduce the systems's weight and size as we selected the chip-on-board LED, which is easy to apply to optical systems, unlike existing package-on-board LEDs. The luminous-intensity-distribution angles were $45^{\circ}$, $60^{\circ}$, $90^{\circ}$, and $120^{\circ}$. We researched these four types of optical systems. The $45^{\circ}$ and $60^{\circ}$ units were developed into reflectors, and the $90^{\circ}$ and $120^{\circ}$ units, into lenses. We checked the performance of the designed optical system through simulation and made a mock-up. Then we made a prototype of the chip-on-board LED high bay for use with the mock-up. After measuring its performance, we tested the luminous-intensity-distribution angles and compared them with simulation data. The resulting prototype was developed considering brightness, light uniformity, age, and economics which are suitable for a factory environment.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.10
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• pp.676-681
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• 2015

Recently many studies being carried out to increase the light efficiency of LED. The external quantum efficiency of LED, generally the light efficiency, is determined by the internal quantum efficiency and the light extraction efficiency. The internal quantum efficiency of LED was already reached to more than 90%, but the light extraction efficiency is still insufficient compared with the internal quantum efficiency because the total internal reflection is generated in the interface between the LED chip and air. Thus, we studied about flip chip LED with PSS and performed the optical simulation which find more optimized PSS for flip chip LED to increase the light extraction efficiency. Decreasing of the total internal reflection and effect of diffused reflection according to PSS improved the light extraction efficiency. To get more higher the efficiency, we simulated flip chip with PSS that the parameters are arrangement, edge spacing, radius, height and shape of PSS.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.6
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• pp.25-34
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• 2000

This paper describes design of a 250-Mbps 10-channel optical receiver array for parallel optical interconnection with the general-purpose CMOS technology The optical receiver is one of the most important building blocks to determine performance of the parallel optical interconnection system. The chip in CMOS technology makes it possible to implement the cost-effective system also. Each data channel consists of analog front-end including the integrated photo-detector and amplifier chain, digital block with D-FF and off-chip driver. In addition, the chip includes PLL (Phase-Lock Loop) for synchronous data recovery. The chip was fabricated in a 0.65-${\mu}{\textrm}{m}$ 2-poly, 2-metal CMOS technology. Power dissipation of each channel is 330㎽ for $\pm$2.5V supply.

• Journal of Bio-Environment Control
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• v.1 no.1
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• pp.61-71
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• 1992

This study is performed to develop an automatic irrigation control of system for effective water management in greenhouse. The automatic irrigation control system is composed of an IR-RED optical sensor in tensiometer and an One-chip micro controller. The following results are obtained : 1. A practical IR-RED optical sensor in tensiometer, which shows the starting point of irrigation, was developed. 2. The automatic irrigation system with the optical sensor and One-chip micro controller was developed and also designed to be able to combine with the control system for temperature, curtain opening, etc. 3. A multiple irrigation control system for several greenhouses were suggested. 4. The results of the system test with the driving program for automatic water management were excellent.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.717-722
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• 2004

A design was done, and all characteristic of photodetectr of the web pattern type which a standard process of the Bipolar which Si PIN structure was used in this paper, and was used for the current amplifier design was used, and high-speed, was used as receiving optcal area of high altitude, and the module which had a low dark current characteristic was implemented with one chip with a base. Important area decreases an area of Ie at the time of this in order to consider an electrical characteristic and economy than the existing receiving IC, and performance of a product and confidence are got done in incense. First of all, the receiving IC which a spec, pattern of a wafer to he satisfied with the following electrical optical characteristic that produced receiving IC of 5V and structure are determined, and did one-chip is made. On the other hand, the time when AR layer of double is $Si_{3}N_{4}/SiO_{2}=1500/1800$ has an optical reflectivity of less than $10{\%}$ on an incidence optical wavelength of 660 ,and, in case of photo detector which reverse voltage made with 1.8V runs in 1.65V, an error about a change of thickness is very the thickness that can be improved surely. And, as for the optical current characteristic, about 5 times increases had the optical current with 274nA in 55nA when Pc was -27dBm. A BJT process is used, and receiving IC running electricity suitable for low voltage and an optical characteristic in minimum 1.8V with a base with two phases is made with one chip. IC of low voltage operates in 1.8V and 3.0V at the same time, and optical link receiving IC is going to be implemented

• Korean Journal of Optics and Photonics
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• v.12 no.6
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• pp.503-506
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• 2001

When DC voltages from 5 V up to 90 V are applied to a transmitter chip excited by an ultrafast lacer beam, the terahertz electromagnetic pulses and their spectra are changed. The spectrum shifts to the high frequency range when the high DC voltage is applied to the chip. At that time, the signal-to-noise ratio is increased from 250: 1 to 10,000: 1. The spectrum can expand up to 4 THz by optimal realignment of the THz system. Also, two terahertz electromagnetic pulses are generated from a receiver chip when the laser detection beam is reflected to the back side of the chip.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.24 no.4
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• pp.448-454
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• 2015

In this paper, the band structural design that is typically in a line was arranged in a ring shape, so as to configure the high power LED lighting in such a way as to form a concentrated light distribution angle of less than 15 degrees. The parabolic aluminized reflector PAR38 that facilitates design using area and the area of the optical system to the same extent, applied a multiple light-source condenser lens optical system for the control of integration. The LED used here implemented a single linear light source using ans LED module with ans LED, flip-chip chip-scale package. The optical system was designed based on the energy star standard.