• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.11a
• /
• pp.53-53
• /
• 2009

Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.384-384
• /
• 2012

We report nonvolatile memory properties of poly (3, 4-ethylenedioxythiophene) (PEDOT) thin films grown by vapor phase polymerization using FeCl3 as an oxidant. Liquid-bridge-mediated transfer method was employed to remove FeCl3 for generation of pure PEDOT thin films. From the electrical measurement of memory device, we observed voltage induced bipolar resistive switching behavior with ON/OFF ratio of 103 and reproducibility of more than 103 dc sweeping cycles. ON and OFF states were stable up to 104 seconds without significant degradation. Cyclic voltammetry data illustrates resistive switching effect can be attributed to formation and rupture of conducting paths due to oxidation and reduction of PEDOT. The maximum current before reset process was found to be increase linearly with increase in compliance current applied during set process.

• Journal of the Korean Institute of Telematics and Electronics T
• /
• v.36T no.1
• /
• pp.13-18
• /
• 1999

The trap density by the stress bias in silicon oxides with different thicknesses has been investigated. The trap density by stress bias was shown to be composed of on time current and off time current. The on time trap density was composed of dc current. The off time trap density was caused by the tunneling charging and discharging of the trap in the interfaces. The on time trap density was used to estimate to the limitations on oxide thicknesses. The off time trap density was used to estimate the data retention in nonvolatile memory devices.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.17 no.2
• /
• pp.199-203
• /
• 2017

Mutually-actuated-nano-electromechanical (MA-NEM) memory switches are proposed for scalability improvement. While conventional NEM memory switches have fixed electrode lines, the proposed MA-NEM memory switches have mutually-actuated cantilever-like electrode lines. Thus, MA-NEM memory switches show smaller deformations of beams in switching. This unique feature of MA-NEM memory switches allows aggressive reduction of the beam length while maintaining nonvolatile property. Also, the scalability of MA-NEM memory switches is confirmed by using finite-element (FE) simulations. MA-NEM memory switches can be promising solutions for reconfigurable logic (RL) circuits.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.322-322
• /
• 2016

Phase change memory (PCM) has attracted much attention as one of the most promising candidates for next-generation nonvolatile memory. In that regard, the purposes of the study are to propose reference of effective pulse parameter to control phase switching operation and to invest the effect of nitrogen doped in PCM materials for improved cycling stability and economic energy consumption. Switching operation of PCM is affected by electric pulse parameter and as shown in figure.1 are composed to RT(rising time), ST(setting time), FT(falling time) and the effect of these parameter was precisely investigated. Transmission electron microscope (TEM) was used to confirm fine structure and retention cycle test was conducted to confirm reliability. Finally improvement reliability and economic power consumption in quantitatively are obtainable by optimum pulse parameter and nitrogen doping in GST material. these study is related to the engineering background of other semiconductor industries and it have confirmed to possibility further applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.125-125
• /
• 2009

유기물 강유전체 재료를 이용한 비휘발성 메모리에 대한 연구가 활발하게 진행되고 있다. 현재까지 알려진 대표적인 재료는 P(VDF-TrFE)이다. P(VDF-TrFE)는 결정화 온도가 낮기 때문에 저온공정이 가능하여 향 후 플렉서블 소자 응용에도 유망하다. 최근의 연구결과에서는 고유전율의 절연층을 삽입함으로써 누설전류를 감소시켜, 저전압에서 우수한 강유전성이 얻어질이 보고되고 있다. 본 논문에서는 P(VDF-TrFE)의 조성 변화를 통하여 최적의 강유전성이 얻어지는 조건을 찾고자 노력하였으며, 조성 변화에 따른 구조적, 전기적 특성에 대하여 보고한다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1995.05a
• /
• pp.86-89
• /
• 1995

In this pacer, The effect of the impedances in SNOSEFT s memory devices has been developed. The effect of source and drain impedances are measuring using the method of the field effect bias resistance in the inner resistance regions of the device structure and external bias resistance. The effect of impedance by source and drain resistance shows according to increasing to the storage of memory charges, shows according to a function of decreasing to the gate voltages, shows the delay of threshold voltages, The delay time of low conductance state and high conductance state by the impedance effect shows 3 [${\mu}$sec] and 1[${\mu}$sec] respectively.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2003.03a
• /
• pp.35-35
• /
• 2003

Recent progress in the integration of the ferroelectric random access memories (FRAM) has attracted much interest. Strontium bismuth tantalate(SBT) is one of the most attractive materials for use in nonvolatile-memory applications due to low-voltage operations, low leakage current, and its excellent fatigue-free property. High-density FRAMs operated at a low voltage below 1.5V are applicable to mobile devices operated by battery. SBT films thinner than 0.1 #m can be operated at a low voltage, because the coercive voltage (Vc) decreases as the film thickness is reduced. In addition, the thickness of the SBT film will have to be reduced so it can fit between adjacent storage nodes in a pedestal type capacitor in future FRAMs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.11a
• /
• pp.267-270
• /
• 1998

We measured the dielectric properties with YMnO$_3$ ceramics using solution method based procedure via by citrate. The crystalline phases were determined using XRD. Also we observed morphologies of YMnO$_3$ ceramics using SEM. We proved the structure of YMnO$_3$ ceramics which is hexagonal. But lots of pores were observed the microstructure. It would be considered as volatile organic. The maximum density of YMnO$_3$ ceramics is obtained sintering temperature 135$0^{\circ}C$ and the ratio 0.95/1.05 of Y/Mn. But even though the density we obtained is the highest, that is lower than theoretical density because of remaining organics by citric acid. Dielectric constant and dissipation factor were improved as increasing sintering temperature and the Y/Mn ratio (0.95/1.05)

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1991.10a
• /
• pp.44-47
• /
• 1991

Electron injection and memory retention chracteristics of the MNOS devices with thin oxide layer of 23${\AA}$ thick and silicon nitride layer of 1000${\AA}$ thick which are fabricated for this experiment. As a result, pulse amplitude increase oxide current is dominated in linearly increasing region of $\Delta$V$\_$FB/the decreasing region after saturation was due to the increased silicon nirtide current. In low pulse ampiltude $\Delta$V$\_$FB/ is not variated on temperature, but as temperature and pulse amplitude increase. $\Delta$V$\_$FB/ is decreased after saturation. And the decay rate during 10$^4$sec after electron injection was ohiefly dominated by the back tunneling of emission from memory trap to silicon. Memory retention characteristics in V$\_$FB/ stage was better than that of OV retention regardless of injection conditions.