• Journal of the Korean Chemical Society
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• v.61 no.6
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• pp.311-319
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• 2017

By using Density Functional Theory (DFT), we have performed alkali metal and alkaline earth metal inside fullerene-like BeO cluster (FLBeOC) in terms of energetic, geometric, charge transfer, work function and electronic properties. It has been found that encapsulated processes of the alkali metal are exothermic and thermodynamically more favorable than alkaline earth metal encapsulation, so that interaction energy ($E_{int}$) of the alkali metal encapsulation FLBeOC is in the range of -0.02 to -1.15 eV at level of theory. It is found that, the electronic properties of the pristine fullerene-like BeO cluster are much more sensitive to the alkali metal encapsulation in comparison to alkaline earth metal encapsulation. The alkali and alkaline earth metal encapsulated fullerene-like BeO cluster systems exhibit good sensitivity, promising electronic properties which may be useful for a wide variety of next-generation nano-sensor device components. The encapsulation of alkali and alkali earth metal may increase the electron emission current from the FLBeOC surface by reducing of the work function.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.6
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• pp.433-439
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• 2011

Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high temperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.

• Korean Chemical Engineering Research
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• v.47 no.6
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• pp.715-719
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• 2009

The phase change electrode board for the bio-information detection through electrical property response of phase change material was developed in this study. We manufactured the electrode board using Aluminum first that is widely used in conventional semiconductor device process. Without further treatment, these aluminum electrodes tend to contain voids in PETEOS(plasma enhanced tetraethyoxysilane) material that are easily detected by cross-sectional SEM(Scanning Electron Microscope). The voids can be easily attacked and transformed into holes in between PETEOS and electrodes after etch back and washing process. In order to resolve this issue of Al electrode board, we developed a electrode board manufacturing method using low resistivity TiN, which has advantages in terms of the step-coverage of phase change($Ge_2Sb_2Te_5$, GST) thin film as well as thermodynamic stability, without etch back and washing process. This TiN material serves as the top and bottom electrode in PRAM(Phase-change Random Access Memory). The good connection between the TiN electrode and GST thin film was confirmed by observing the cross-section of TiN electrode board using SEM. The resistances of amorphous and crystalline GST thin film on TiN electrodes were also measured, and 1000 times difference between the amorphous and crystalline resistance of GST thin film was obtained, which is well enough for the signal detection.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.480-480
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• 2011

양극산화(anodization)는 금속을 전기화학적으로 산화시켜 금속산화물로 만드는 기술로서 최근 다양한 크기의 나노 구조를 제조하는 기술로 각광받고 있으며, 이러한 기술에 의하여 얻어지는 anodic aluminum oxide(AAO)는 magnetic data storage, optoelectronic device, sensor에 적용될 수 있는 nano device 뿐만 아니라 nanostructure를 제조하기 위한 template 및 mask로써 최근 광범위 하게 연구되고 있다. 또한, AAO는 Al2O3의 단단한 구조를 가진 무기재료이므로 solid mask로써 다른 porous materials 보다 뛰어난 특성을 갖고 있다. 또한 electron-beam lithography 및 block co-polymer 에 의한 patterning 과 비교하여 매우 경제적이며, 재현성이 우수할 뿐만 아니라 대면적에서 나노 구조의 크기 및 형상제어가 비교적 쉽기 때문에 널리 사용되고 있다. 그러나, AAO 형성 시 생기게 되는 반구형 모양의 barrier layer는 물질(substance)과 기판과의 direct physical and electrical contact을 방해하기 때문에 해결해야 할 가장 큰 문제점 중 하나로 알려져 있다. 따라서 본 연구에서는 실리콘 기판위의 형성된 AAO의 barrier layer를 Cl/BCl3 gas mixture에서 Neutral Beam Etching (NBE)과 Ion Beam Etching (IBE) 로 각각 식각한 후 그 결과와 비교하였다. NBE와 IBE 모두 Cl2/BCl3 gas mixture에서 BCl3 gas의 첨가량이 60% 일 경우 etch rate이 가장 높게 나타났고, optical emission spectroscopy (OES)로 Cl2/BCl3 플라즈마 내의 Cl radical density와 X-ray photoelectron spectroscopy (XPS)로 AAO 표면 위를 관찰한 결과 휘발성 BOxCly의 형성이 AAO 식각에 크게 관여함을 확인 할 수 있었다. 또한, NBE와 IBE 실험한 다양한 Cl2/BCl3 gas mixture ratio 에서 AAO가 식각이 되지만, 이온빔의 경우 나노사이즈의 AAO pore의 charging에 의해 pore 아래쪽의 위치한 barrier layer를 어떤 식각조건에서도 제거하지 못하였다. 하지만, NBE에서는 BCl3-rich Cl2/BCl3 gas mixture인 식각조건에서 AAO pore에 휘발성 BOxCly를 형성하면서 barrier layer를 제거할 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.99-100
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• 2006

Silicon-on-insulator(SOI) MOSFET with SiGe/Si heterostructure channel is an attractive device due to its potent use for relaxing several limits of CMOS scaling, as well as because of high electron and hole mobility and low power dissipation operation and compatibility with Si CMOS standard processing. SOI technology is known as a possible solution for the problems of premature drain breakdown, hot carrier effects, and threshold voltage roll-off issues in sub-deca nano-scale devices. For the forthcoming generations, the combination of SiGe heterostructures and SOI can be the optimum structure, so that we have developed SOI n-MOSFETs with SiGe/Si heterostructure channel grown by reduced pressure chemical vapor deposition. The SOI n-MOSFETs with a SiGe/Si heterostructure are presented and their DC characteristics are discussed in terms of device structure and fabrication technology.

• Applied Microscopy
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• v.38 no.4
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• pp.279-284
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• 2008

The phase change materials have been extensively used as an optical rewritable data storage media utilizing their phase change properties. Recently, the phase change materials have been spotlighted for the application of non-volatile memory device, such as the phase change random access memory. In this work, we have investigated the crystallization behavior and microstructure analysis of In-Sb-Te (IST) thin films deposited by RF magnetron sputtering. Transmission electron microscopy measurement was carried out after the annealing at $300^{\circ}C$, $350^{\circ}C$, $400^{\circ}C$ and $450^{\circ}C$ for 5 min. It was observed that InSb phases change into $In_3SbTe_2$ phases and InTe phases as the temperature increases. It was found that the thickness of thin films was decreased and the grain size was increased by the bright field transmission electron microscopy (BF TEM) images and the selected area electron diffraction (SAED) patterns. In a high resolution transmission electron microscopy (HRTEM) study, it shows that $350^{\circ}C$-annealed InSb phases have {111} facet because the surface energy of a {111} close-packed plane is the lowest in FCC crystals. When the film was heated up to $400^{\circ}C$, $In_3SbTe_2$ grains have coherent micro-twins with {111} mirror plane, and they are healed annealing at $450^{\circ}C$. From the HRTEM, InTe phase separation was occurred in this stage. It can be found that $In_3SbTe_2$ forms in the crystallization process as composition of the film near stoichiometric composition, while InTe phase separation may take place as the composition deviates from $In_3SbTe_2$.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.281.1-281.1
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• 2016

Transition metal dichalcogenides (TMDCs) are promising layered structure materials for next-generation nano electronic devices. Many investigation on the FET device using TMDCs channel material have been performed with some integrated approach. To use TMDCs for channel material of top-gate thin film transistor(TFT), the study on high-k dielectrics on TMDCs is necessary. However, uniform growth of atomic-layer-deposited high-k dielectric film on TMDCs is difficult, owing to the lack of dangling bonds and functional groups on TMDC's basal plane. We demonstrate the effect of remote oxygen plasma pretreatment of large area synthesized few-layer MoSe2 on the growth behavior of Al2O3, which were formed by atomic layer deposition (ALD) using tri-methylaluminum (TMA) metal precursors with water oxidant. We investigated uniformity of Al2O3 by Atomic force microscopy (AFM) and Scanning electron microscopy (SEM). Raman features of MoSe2 with remote plasma pretreatment time were obtained to confirm physical plasma damage. In addition, X-ray photoelectron spectroscopy (XPS) was measured to investigate the reaction between MoSe2 and oxygen atom after the remote O2 plasma pretreatment. Finally, we have uniform Al2O3 thin film on the MoSe2 by remote O2 plasma pretreatment before ALD. This study can provide interfacial engineering process to decrease the leakage current and to improve mobility of top-gate TFT much higher.

• Journal of the Korean Vacuum Society
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• v.21 no.1
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• pp.36-40
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• 2012

We have developed the detection method of the resonance frequency of micro/nano mechanical resonator using optical method. The optical interferometery method enabled us to detect the displacement change of resonators within several nm scale. The micro mechanical resonator was produced by attaching a micro mechanical cantilever to a piezo ceramic. The mass of cantilever was increased by evaporating Au using electron beam evaporator and the mass variation was estimated by detecting the resonance frequency changes.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.117-123
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• 2004

A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.168-168
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• 2008

Dimension of a transistor has rapidly shrunk to increase the speed of device and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate dioxide layer and low conductivity characteristic of poly-Si gate in nano-region. To cover these faults, study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$, and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-Si gate is not compatible with high-k materials for gate-insulator. Poly Si gate with high-k material has some problems such as gate depletion and dopant penetration problems. Therefore, new gate structure or materials that are compatible with high-k materials are also needed. TiN for metal/high-k gate stack is conductive enough to allow a good electrical connection and compatible with high-k materials. According to this trend, the study on dry etching of TiN for metal/high-k gate stack is needed. In this study, the investigations of the TiN etching characteristics were carried out using the inductively coupled $BCl_3$-based plasma system and adding $Cl_2$ gas. Dry etching of the TiN was studied by varying the etching parameters including $BCl_3$/Ar gas mixing ratio, RF power, DC-bias voltage to substrate, and $Cl_2$ gas addition. The plasmas were characterized by optical emission spectroscopy analysis. Scanning electron microscopy was used to investigate the etching profile.