• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.20 no.4
• /
• pp.348-351
• /
• 2007

Recently, Nanotechnology becomes a major issue in most part of industries. Nanotechnology is expected to develop various application products due to nano material mired composites is improved physical and electrical properties compared to conventional composites materials. Dielectric and insulation materials need to develop and improve like other field about nanotechnology. In this paper, we reported dielectric dispersion by size(no filler, $1.2{\mu}m$, 500 nm, 10 nm), frequencies(60, 120, 1 kHz), and temperatures($30{\sim}170^{\circ}C$). Dielectric constant of composites materials with filler shows higher than composites materials without filler and increased depending on rising temperatures in low frequency region. It was the effect that nano-filler and impurities in composites contributed to electrical conductivity. And dielectric properties depending on temperatures shows to change in low frequency region dramatically We analyzed interfacial polarization in low frequency region($10^{-2}$ Hz) and oriented polarization in high frequency region($10^{-5{\sim}6}$ Hz) on composites materials.

• Journal of the Korean Ceramic Society
• /
• v.48 no.1
• /
• pp.1-5
• /
• 2011

Silicon carbide (SiC) has recently drawn an enormous industrial interest because of its useful mechanical properties such as thermal resistance, abrasion resistance and thermal conductivity at high temperature. RF Thermal plasma (PL-35 Induction Plasma, Tekna CO., Canada) has been utilized for synthesis of high purity SiC powder from cheap inorganic solution (Tetraethyl Orthosilicate, TEOS). It is found that the powders by thermal plasma consist of SiC with free carbon and amorphous silica ($SiO_2$) and, by thermal treatment and HF treatment, the impurities are driven off resulting high purity SiC nano-powder. The synthesized SiC powder lies below 30 nm and its properties such microstructure, phase composition, specific surface area and free carbon content have been characterized by X-ay diffraction (XRD), field emission scanning electron microscopy (FE-SEM), thermogravimetric (TG) and Brunauer-Emmett-Teller (BET).

• Journal of Magnetics
• /
• v.17 no.2
• /
• pp.78-82
• /
• 2012

CoNiFe(CNF)/$BaTiO_3(BTO)$/CoNiFe(CNF) multilayered thin films were deposited on Pt/Ti/$SiO_2$/Si substrates by using pulsed laser deposition (PLD) system. We fabricated three different thin films of BTO, BTO/CNF and CNF/BTO/CNF for magneto-capacitor and studied their crystalline structure, surface and interface morphology, and magnetic and electrical properties. When three different structures of multilayered thin film were compared, magnetization of CNF/BTO/CNF thin films was decreased by magnetic and dielectric interaction. Also we confirmed that capacitance of CNF/BTO/CNF multilayered thin film was enhanced as being near tetragonal structure with increasing of c/a ratio because of atomic bonding at interface between BTO dielectric and CNF magnetic materials. Finally, we studied the change of the capacitance of CNF/BTO/CNF multilayered thin film with magnetic field for emergence of magnetocapacitance and suggested a possibility of enhanced capacitance.

• Proceedings of the KIEE Conference
• /
• 2008.07a
• /
• pp.1277-1278
• /
• 2008

Pentacene 박막 트랜지스터의 소스/드레인 전극을 폴리머인 Poly(3,4-ethylene dioxythiophene) poly(styrenesulfonate) (PEDOT:PSS)를 사용하여 잉크젯 프린팅 방법으로 제작하였다. 펜타신 박막 트랜지스터는 열 증착법을 사용하여 폴리며 기판위에 100nm의 두께로 증착하였다. 게이트 절연막은 $SiO_2$ 위에 Polymethly Methacrylate (PMMA)를 증착시킨 double layer를 사용하였다. PMMA 위에 증착시킨 pentacene 결정립이 $SiO_2$ 위에 증착한 pentacene 결정립 보다 크게 성장하였고, double layer의 절연막을 씀으로 인해 게이트 누설 전류가 감소함을 보였다. Pentacene 증착 온도에 따른 결정립 크기를 비교하여 가장 적절한 온도를 찾았다. 프린팅 방법을 사용하여 만든 박막 트랜지스터는 전계효과 이동도가 ${\mu}_{FET}=0.023cm^2/Vs$ 이고, 문턱이전 기울기 S.S=0.49V/dec, 문턱전압 $V_{th}=-18V$, $I_{on}/I_{off}$ 전류비 >$10^3$의 전기적 특성을 보였다.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.19 no.8
• /
• pp.14-18
• /
• 2018

Generally. the Ohmic's law is an important factor to increase the conductivity in a micro device. So it is also known that the Ohmic contact in a semiconductor device is import. The PN junction as a structure of semiconductor involves the depletion layer, and this depletion layer induces the non linear electrical properties and also makes the Schottky contact as an intrinsic characteristics of semiconductor. To research the conduction effect of insulators in the semiconductor device, $SiO_2$ thin film and $V_2O_5/SiO_2$ thin film were researched by using the current-voltage system. In the nano electro-magnetic system, the $SiO_2$ thin film as a insulator had the non linear Schottky contact, and the as deposited $V_2O_5$ thin film had the linear Ohmic contact owing to the $SiO_2$ thin film with superior insulator's properties, which decreases the leakage current. In the positive voltage, the capacitance of $SiO_2$ thin film was very low, but that of $V_2O_5$ thin film increased with increasing the voltage. In the normal electric field system, it was confirmed that the conductivity of $V_2O_5$ thin film was increased by the effect of $SiO_2$ thin film. It was confirmed that the Schottky contact of semiconductors enhanced the performance of electrical properties to increased the conductivity.

• Proceedings of the Korean Institute of Surface Engineering Conference
• /
• 2017.05a
• /
• pp.67.2-67.2
• /
• 2017

본 연구에서는 $SiO_2$ 미세구조 상에 Pd 나노입자(NPs)를 증착하여, 불소화된 마이크로-나노 계층구조를 갖는 Pd-decorated $SiO_2$($Pd/SiO_2$)를 제작하였다. 마이크로 크기의 거칠기를 갖는 $SiO_2$ 층은 졸-겔 공정을 사용해서 제조된 용액을 전기분사함으로써 제조되었다. 이어서, 자외선(UV)을 이용한 광 환원법을 이용해 Pd 나노입자를 $SiO_2$ 층에 형성했다. 생성된 표면은 마이크로-나노의 계층구조 형태를 보여주었다. 해당 시편의 불소화 처리 후, 마이크로-나노의 계층구조 표면은 $170^{\circ}$ 이상의 물 접촉각(water contact angle; WCA) 및 $5^{\circ}$ 이하의 슬라이딩 각(sliding angle)을 보여줌으로써 물에 대해 탁월한 소수성을 나타내었다. 또한, 커피($CA=161^{\circ}$), 우유($CA=162^{\circ}$), 쥬스($CA=163^{\circ}$), 그리고 글리세롤($CA=165^{\circ}$)에 대해서도 우수한 소수 특성을 보여주었다. 또한, 이들 $Pd/SiO_2$ 층은 우수한 장기내구성 및 자외선 저항성을 보여주었다. 그리고 이어진 기름에 대한 접촉각 측정을 통해 해당 시편이 소유 특성이 아닌 친유 특성을 보여준다는 것을 확인할 수 있었고, 기름에 대한 CA는 약 ${\sim}10^{\circ}$로 매우 우수한 친유 특성을 나타내었다. 이와 같은 결과는 자체세정이 가능한 표면 및 지능형 물/기름 분리 시스템과 같은 스마트 장치에서 초소수성-친유성 특성을 갖는 계층구조의 $Pd/SiO_2$ 층을 사용할 가능성을 명확하게 보여준다고 판단된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.127-128
• /
• 2008

The electrical characteristics of VARIOT (variable oxide thickness) with various $HfO_2$ thicknesses on thin $SiO_2$ or $Al_2O_3$ layer were investigated. Especially, the charge trapping characteristics of $HfO_2$ layer were intensively studied. The thin $HfO_2$ layer has small charge trapping characteristics while the thick $HfO_2$ layer has large memory window. Therefore, the $HfO_2$ layer is superior material and can be applied to charge storage as well as tunneling barrier of the non-volatile memory applications.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2003.02a
• /
• pp.125-125
• /
• 2003

• Proceedings of the KIEE Conference
• /
• 2006.07c
• /
• pp.1341-1342
• /
• 2006

Electrical characteristics of field-effect thin film transistors (TFTs) with p-channels of CdTe/CdHgTe core-shell nanocrystals are investigated in this paper. For the fabrication of bottom- and top-gate TFTs, CdTe/CrHgTe nanocrystals synthesized by colloidal method are first dispersed on oxidized p+ Si substrates by spin-coating, the dispersed nanoparticles are sintered at $150^{\circ}C$ to form the channels for the TFTs, and $Al_{2}O_{3}$ layers are deposited on the channels. A representative bottom-gate field-effect TFT with a bottom-gate $SiO_2$ layer exhibits a mobility of $0.21cm^2$/ Vs and an Ion/Ioff ratio of $1.5{\times}10^2$ and a representative top-gate field-effect TFT with a top-gate $Al_{2}O_{3}$ layer provides a field-effect mobility of $0.026cm^2$/ Vs and an Ion/Ioff ratio of $2.5{\times}10^2$. $Al_{2}O_{3}$ was deposited for passivation of CdTe/CdHgTe core-shell nanocrystal layer, resulting in enhanced hole mobility, Ior/Ioff ratio by 0.25, $3{\times}10^3$, respectively. The CdTe/CdHgTe nanocrystal-based TFTs with bottom- and top gate geometries are compared in this paper.

• Korean Journal of Materials Research
• /
• v.24 no.11
• /
• pp.639-643
• /
• 2014

Hydrophilic $SiO_2$ layers were obtained by the atmospheric-pressure plasma treatment. Superhydrophobic $SiO_2$ layers were first deposited by the electrospray deposition method. The electrospunable solution that was prepared based on the solgel method was sprayed on Si (100) substrates. The surface of the electrosprayed $SiO_2$ layers consisted of the agglomeration of nano-sized grains, which led to a very high roughness and revealed a very high contact angle to water droplets over $162^{\circ}$. After having been exposed to the atmospheric $Ar/O_2$ plasma, the observed superhydrophobicity of the $SiO_2$ layers were greatly changed: a dramatic variation of the water contact angle from $162^{\circ}$ to $3^{\circ}$, namely realization of superhydrophillicity. Interestingly, the surface microstructure was almost preserved. According to the XPS analysis, it is more likely that thanks to the plasma exposure, the surface of $SiO_2$ layers will be cleaned in terms of organic species that are hydrophobic-inducing, consequently leading to the hydrophilic nature observed for the plasma-exposed $SiO_2$ layers.