• 한국초전도학회:학술대회논문집
• /
• 한국초전도학회 2000년도 High Temperature Superconductivity Vol.X
• /
• pp.165-168
• /
• 2000

We fabricated ramp-edge Josephson junctions with barriers formed by interface treatments instead of epitaxially grown barrier layers. A low-dielectric Sr$_2$AlTaO$_6$(SAT) layer was used as an ion-milling mask as well as an insulating layer for the ramp-edge junctions. An ion-milled YBa$_2$Cu$_3$O$_{7-x}$ (YBCO)-edge surface was not exposed to solvent through all fabrication procedures. The barriers were produced by structural modification at the edge of the YBCO base electrode using high energy ion-beam treatment prior to deposition of the YBCO counter electrode. We investigated the effects of high energy ion-beam treatment, annealing, and counter electrode deposition temperature on the characteristics of the interface-controlled Josephson junctions. The junction parameters such as T$_c$, I$_c$c, R$_n$ were measured and discussed in relation to the barrier layer depending on the process parameters.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
• /
• pp.278.1-278.1
• /
• 2013

Among the prerequisites for stable neural interfacing are the long-term stability of electrical performance of and the excellent biocompatibility of conducting materials in implantable neural electrodes. Reduced graphene oxide offers a great potential for a variety of biomedical applications including biosensors and, particularly, neural interfaces due to its superb material properties such as high electrical conductivity, decent optical transparency, facile processibility, and etc. Nonetheless, there have been few systematic studies on the graphene-based neural interfaces in terms of biocompatibility of electrode materials and long term stability in electrical characteristics. In this research, we prepared the primary culture of rat hippocampal neurons directly on reduced graphene oxide films which is chosen as a model electrode material for the neural electrode. We observed that the viability of primary neuronal culture on the present structure is minimally affected by nanoscale graphene flakes below. These results implicate that the multilayer films of reduced graphene oxides can be utilized for the next-generation neural interfaces with decent biocompatibility and outstanding electrical performance.

• 한국통신학회논문지
• /
• 제23권4호
• /
• pp.988-996
• /
• 1998

BN 세라믹에 소결조제로 0.07wt% $V_{2}O_{5}$ 와 0.03wt% CuO을 첨가 하였을 때(BNC3V7) Ag 전극과 동시 소성이 가능한 $900^{\circ}C$ 소결할 수 있었다. 이때 BNC3V7 시편은 유전상수 44.3 $Qxf_{o}$값 22,000 GHz, TCF 값 ppm$/^{\circ}C$의 유전특성을 얻을 수있었다. PCS대역에서 사용 가능한 적층칩 대역 필터를 기존의 방법과 태핑기법에 의한 2가지 방법으로 설계하였다. 입출력 태핑 기법을 이용하여 필터를 제조할 경우 입출력 커플링을 이용한 기존방법에 비해 layer를 감소시킬 수 있어 구조가 간단해진다는 장점이 있다. 적층칩 대역 필터는 Tape casting한 후 Ag전극을 이용하여 Screen printing하여 제작 하였다. 제작된 필터는 $900^{\circ}C$에서 소결하여 설계된 필터와 특성 값을 비교 하였다. 태핑된 칩 필터와 기존 칩 필터 모두 중심주파수는 90MHz 낮은 주파수 대역으로 이동 하였지만 대역 통과 특성은 설계 값과 유사 하였다. 태핑된 칩 필터의 스퓨리어스 특성은 기존 칩 필터에 비해 향상되었다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2007년도 추계학술대회 논문집
• /
• pp.181-181
• /
• 2007

PTCR 세라믹스를 적층형 부품으로 제조할 경우 소형화, 저 저항화 및 과전류 유입 시 빠른 응답특성을 갖는다는 장점을 가지고 있으며, 이러한 적층형 부품제조시에는 내부전극재가 부품소자의 물성에 중요한 영향을 미친다. 특히 우수한 옴성 접촉(Ohmic Contact)을 갖는 Zn, Fe, Sn, Ni 등의 적층 PTC용 전극재는 높은 산화특성으로 인해 재산화 과정에서의 비옴성 접촉(Non-ohmic contact)을 갖게 되어 PTC 특성을 저하시킬 우려가 있다. 따라서 본 연구에서는 적층형 PTCR 세라믹스의 내부전극재와 반도체 세라믹층의 동시소성거동 및 적층 PTCR 세라믹스의 전기적 특성을 평가하였다. 본 연구에 적용된 내부전극재로는 Ni 전극을 사용하였고, Ni 전극용 paste로는 무공제 paste, 반도체 세라믹공제 paste, $BaTiO_3$ 공제 paste의 3종 전극재가 이용되었다. 적층형 PTCR 세라믹스의 제조공정은 테이프 캐스팅(Tape casting), 내부전극인쇄, 적층 및 동시소성을 포함하는 적층화공정을 적용하였다. 각각의 전극 paste를 적용하여 제조된 chip은 미세구조관찰, I-V특성, R-T특성 등을 평가하여 내부전극내 세라믹공제의 영향을 고찰하였다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
• /
• pp.264-265
• /
• 2008

While the reliability of bulk insulation has become important particularly in multilayer boards and embedded boards, electronics are to be used under various environments such as at high temperature and in high humidity. We observed internal space charge behavior for two types of epoxy composites under dc electric fields to investigate the influence of water at high temperature. In the case of glass/epoxy specimen, homocharge is observed at water-treated specimen, and spatial oscillations become clearer in the water-treated specimens. Electric field in the vicinity of the electrodes shows the injection of homocharge. In aramid/epoxy specimens, heterocharge is observed at water-treated specimens, i.e. negative charge accumulates near the anode, while positive charge accumulates near the cathode. Electric field is enhanced just before each electrode. In order to further examine the mechanism of space charge formation, we have developed a new system that allows in situ space charge observation during ion migration tests at high temperature and high humidity. Using this in situ system.

• Progress in Superconductivity
• /
• 제12권2호
• /
• pp.114-117
• /
• 2011

We report our efforts on the development of Nb-based non-hysteretic Josephson junction fabrication process for quantu device applications. By adopting and modifying the existing Nb-aluminum oxide tunnel junction process, we develop a process for non-hysteretic Josephson junction circuits using metal-silicide as metallic barrier material. We use sputter deposition of Nb and $MoSi_2$, PECVD deposition of silicon oxide as insulator material, and ICP-RIE for metal and oxide etch. The advantage of the metal-silicide barrier in the Nb junction process is that it can be etched in $SF_6$ RIE together with Nb electrode. In order to define a junction area precisely and uniformly, end-point detection for the RIE process is critical. In this paper, we employed thin Al layer for the etch stop, and optimized the etch condition. We have successfully demonstrated that the etch stop properties of the inserted Al layer give a uniform etch profile and a precise thickness control of the base electrode in Nb trilayer junctions.

• 한국전기전자재료학회논문지
• /
• 제24권11호
• /
• pp.876-881
• /
• 2011

The sintering, defect and grain boundary characteristics of Bi-based ZnO chip varistor (1,608 mm size) have been investigated to know the possibility of lowering a manufacturing price by using 100 % Ag inner-electrode. The samples were prepared by general multilayer chip varistor process and characterized by shrinkage, SEM, current-voltage (I-V), admittance spectroscopy (AS), impedance and modulus spectroscopy (IS & MS) measurement. There are no problems to make a chip varistor with 100% Ag inner-electrode in the sintering temperature range of 850~900$^{\circ}C$ for 1 h in air. A good varistor characteristics ($V_n$= 9.3~15.4 V, a= 23~24, $I_L$= 1.0~1.6 ${\mu}A$) were revealed but formed $Zn_i^{{\cdot}{\cdot}}$(0.209 eV) as dominant defect, and increased the distributional inhomogeneity and the temperature instability in grain boundary barriers.

• 한국전기전자재료학회논문지
• /
• 제11권4호
• /
• pp.281-287
• /
• 1998

$BiNbO_4$ ceramics doped with 0.07wt% $V_2O_5$ and 0.03wt% CuO (BNC3V7) were sucessfully sintered at $900^{\circ}C$ through the firing process with Ag electrode. The BNC3V7 shows typically Dielectric constant of 44.3, Thermal Coefficient of resonance Frequency(TCF) of 2 ppm/$^{\circ} and $Qxf_o$ value of 22,000 GHz. The laminated chip Low Pass Filter (LPF) is very sensitive to chip processing parameters, was confirmed by the computer simulation as a function of Q(Quality factors), filter size, capacitor layer thickness, inductor pattern widths. The multilayer type LPF was fabricated by screen-printing with Ag electrode after tape casting and then compared with the simulated characteristics. The results show that characterization of band pass width was similar to that of designed ones.

• Korean Chemical Engineering Research
• /
• 제60권4호
• /
• pp.550-556
• /
• 2022

당, 알코올, 유기산 및 아미노산 등과 같은 다양한 유기물에 포함된 화학에너지를 전기에너지로 전환시키는 효소 연료전지의 성능은 anode 뿐만 아니라 cathode에도 큰 영향을 받는다. 본 연구의 목적은 laccase 기반의 고성능 cathode 전극을 개발하는데 있다. 효소, 전자전달체 및 탄소나노튜브로 구성된 효소 복합체를 제조하고 이를 전극 표면에 다층으로 부착하며 층수 및 탄소나노튜브의 첨가 유무가 전극 성능에 미치는 영향을 조사하였다. 전극 표면에 효소-전자전달체(Lac-(PVI-Os-dCl))의 층수가 증가할수록 전극에서 발생되는 환원 전류량이 증가하였다. 탄소나노튜브가 첨가된 효소-전자전달체 복합체 전극(Lac-SWCNTs-(PVI-Os-dCl))이 Lac-(PVI-Os-dCl) 전극에 비하여 1.7배 많은 환원 전류를 생성하였다. Lac-SWCNTs-(PVI-Os-dCl)과 Lac-(PVI-Os-dCl)의 비율을 변화시키며 적층한 전극들에서 2층의 Lac-(PVI-Os-dCl)과 2층의 Lac-SWCNTs-(PVI-Os-dCl)으로 구성된 전극이 가장 많은 양의 환원 전류(10.1±0.1 µA)를 생성하였다. 단일 층의 Lac-(PVI-Os-dCl)로 구성된 cathode를 사용하는 셀과 최적화된 cathode를 사용하는 셀의 최대 생산 전력밀도는 각각 0.46±0.05와 1.23±0.04 µW/cm²였다. 본 연구 결과는 전극 표면에 laccase, 전자전달체 및 탄소나노튜브로 구성된 복합체의 적층 최적화를 통해 cathode 및 이를 이용하는 효소 연료전지의 성능을 향상시킬 수 있음을 시사한다.

• 전기학회논문지
• /
• 제64권9호
• /
• pp.1323-1329
• /
• 2015

The WO₃/Ag/WO₃ transparent thin films are fabricated by the RF magnetron sputtering. This has a transmittance of front and rear about 90% in the visible light range and surface resistance of 6.41Ω/□. In this paper, we analyzed the surface characteristics caused by the working pressure and O₂ plasma surface treatment to apply a transparent electrode that was prepared to the laminated structure with other materials. The working pressure was changed in the WO₃ film to 10mTorr, 7mTorr, and 5mTorr, it showed a lower than roughness of conventional ITO. In addition, by 55.5774 J/m² at 5mTorr, it shows the hydrophobic property with lower process pressure. O₂ plasma surface treatment was changed at the condisions of the RF power to 150W, 100W, and 50W and the process time to 240s, 180s, 120s, and 60s. The surface roughness are the maximum roughness(Rmax) 6.437nm and the average roughness(Rq) 0.827nm at RF power 150W, and the maximum roughness (Rmax) 6.880nm and the average roughness (Rq) 0.839nm at process time 240sec. It showed a lower value than the surface treatment. also about working pressure and process time is increased, it showed the hydrophobic.