• 제목/요약/키워드: multicore Scalability

검색결과 8건 처리시간 0.019초

Performance of Distributed Database System built on Multicore Systems

  • Kim, Kangseok
    • 인터넷정보학회논문지
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    • 제18권6호
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    • pp.47-53
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    • 2017
  • Recently, huge datasets have been generating rapidly in a variety of fields. Then, there is an urgent need for technologies that will allow efficient and effective processing of huge datasets. Therefore the problems of partitioning a huge dataset effectively and alleviating the processing overhead of the partitioned data efficiently have been a critical factor for scalability and performance in distributed database system. In our work we utilized multicore servers to provide scalable service to our distributed system. The partitioning of database over multicore servers have emerged from a need for new architectural design of distributed database system from scalability and performance concerns in today's data deluge. The system allows uniform access through a web service interface to concurrently distributed databases over multicore servers, using SQMD (Single Query Multiple Database) mechanism based on publish/subscribe paradigm. We will present performance results with the distributed database system built on multicore server, which is time intensive with traditional architectures. We will also discuss future works.

The Performance Study of a Virtualized Multicore Web System

  • Lu, Chien-Te;Yeh, C.S. Eugene;Wang, Yung-Chung;Yang, Chu-Sing
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제10권11호
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    • pp.5419-5436
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    • 2016
  • Enhancing the performance of computing systems has been an important topic since the invention of computers. The leading-edge technologies of multicore and virtualization dramatically influence the development of current IT systems. We study performance attributes of response time (RT), throughput, efficiency, and scalability of a virtualized Web system running on a multicore server. We build virtual machines (VMs) for a Web application, and use distributed stress tests to measure RTs and throughputs under varied combinations of virtual cores (VCs) and VM instances. Their gains, efficiencies and scalabilities are also computed and compared. Our experimental and analytic results indicate: 1) A system can perform and scale much better by adopting multiple single-VC VMs than by single multiple-VC VM. 2) The system capacity gain is proportional to the number of VM instances run, but not proportional to the number of VCs allocated in a VM. 3) A system with more VMs or VCs has higher physical CPU utilization, but lower vCPU utilization. 4) The maximum throughput gain is less than VM or VC gain. 5) Per-core computing efficiency does not correlate to the quality of VCs or VMs employed. The outcomes can provide valuable guidelines for selecting instance types provided by public Cloud providers and load balancing planning for Web systems.

On-Chip Debug Architecture for Multicore Processor

  • Park, Hyeong-Bae;Xu, Jing-Zhe;Kim, Kil-Hyun;Park, Ju-Sung
    • ETRI Journal
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    • 제34권1호
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    • pp.44-54
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    • 2012
  • Because of the intrinsic lack of internal-system observability and controllability in highly integrated multicore processors, very restricted access is allowed for the debugging of erroneous chip behavior. Therefore, the building of an efficient debug function is an important consideration in the design of multicore processors. In this paper, we propose a flexible on-chip debug architecture that embeds a special logic supporting the debug functionality in the multicore processor. It is designed to support run-stop-type debug functions that can halt and control the execution of the multicore processor at breakpoint events and inspect the possible causes of any errors. The debug architecture consists of the following three functional components: the core debug support block, the multicore debug support block, and the debug interface and control block. By embedding this debug infrastructure, the embedded processor cores within the multicore processor can be debugged simultaneously as well as independently. The debug control is performed by employing a JTAG-based scanning operation. We apply this on-chip debug architecture to build a debugger for a prototype multicore processor and demonstrate the validity and scalability of our approach.

락의 실제 : 멀티코어 상의 데이터베이스 성능 분석 (Locking in Practice : Performance of a Database System on a Multicore Machine)

  • 한혁
    • 한국콘텐츠학회논문지
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    • 제14권8호
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    • pp.22-29
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    • 2014
  • 락은 멀티프로세서 환경에서 공유 데이터에 대한 접근을 안전하게 하는 잘 알려진 일반적인 방법이다. 1960년대에 상호 배제가 소개된 후에 많은 스핀락 알고리즘이 제안되었고 운영체제나 데이터베이스 시스템에 사용되어 왔다. 이 연구에서 고성능 멀티코어 시스템 상에서 락 알고리즘이 데이터베이스 시스템에 미치는 영향을 측정하였다. 평가를 위해 그 동안 멀티코어 상에서 성능 개선을 위해 재구조화된 최신 MySQL 5.6 및 MySQL에 탑재된 InnoDB 엔진을 사용하였다. InnoDB의 스핀락 함수를 수정하여 다양한 락 알고리즘들을 구현하였고 구현된 락 알고리즘들을 멀티코어 환경에서 평가하였다.

Distributed arbitration scheme for on-chip CDMA bus with dynamic codeword assignment

  • Nikolic, Tatjana R.;Nikolic, Goran S.;Djordjevic, Goran Lj.
    • ETRI Journal
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    • 제43권3호
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    • pp.471-482
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    • 2021
  • Several code-division multiple access (CDMA)-based interconnect schemes have been recently proposed as alternatives to the conventional time-division multiplexing bus in multicore systems-on-chip. CDMA systems with a dynamic assignment of spreading codewords are particularly attractive because of their potential for higher bandwidth efficiency compared with the systems in which the codewords are statically assigned to processing elements. In this paper, we propose a novel distributed arbitration scheme for dynamic CDMA-bus-based systems, which solves the complexity and scalability issues associated with commonly used centralized arbitration schemes. The proposed arbitration unit is decomposed into multiple simple arbitration elements, which are connected in a ring. The arbitration ring implements a token-passing algorithm, which both resolves destination conflicts and assigns the codewords to processing elements. Simulation results show that the throughput reduction in an optimally configured dynamic CDMA bus due to arbitration-related overheads does not exceed 5%.

멀티코어 환경에서의 확장성 향상을 위한 메모리 할당자 (Enhanced Memory Allocator for Scalability Improvement On Multicore)

  • 조영중;김인혁;엄영익
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2013년도 춘계학술발표대회
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    • pp.164-165
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    • 2013
  • 멀티프로세서에서 시스템의 병렬성을 향상시키기 위해서 멀티스레드 프로그램을 이용한다. 이러한 멀티스레드 프로그램은 스레드간 역할을 분담하여 작업을 진행하게 된다. 멀티스레드 프로그램에는 생산자-소비자 구조가 있다. 기존 메모리할당자들은 생산자-소비자 구조에 대한 연구가 진행되지 않고, 크리티컬 섹션이 긴 락을 사용하여 성능상에 문제가 있다. 우리는 이러한 문제점을 독특한 메모리 해제 방법을 통해 해결하였고, 실험을 통해 메모리 할당자의 속도가 향상되는 것을 검증하였다.

저널링 파일 시스템을 위한 비휘발성 메모리 기반 병행적 저널링 기법의 설계 및 구현 (Design and Implementation of NVM-based Concurrent Journaling Scheme)

  • 박수희;이은영;한혁
    • 한국콘텐츠학회논문지
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    • 제21권7호
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    • pp.157-163
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    • 2021
  • 파일 시스템에서 하나의 쓰기 연산은 여러 데이터를 수정할 수 있지만, 이러한 파일 시스템의 변경들은 원자적으로 디스크에 써지지 않는다. 따라서 파일 시스템의 일관성을 위해 기존의 저널링 기법은 시스템 성능을 저하시키는 대신 충돌 일관성을 보장한다. 비휘발성 메모리를 저널 공간으로 사용하면 비휘발성 메모리의 낮은 지연 시간과 바이트 수준 접근성으로 성능 저하를 완화시킬 수 있다고 알려졌다. 그러나 비휘발성 메모리를 고려한 저널링 기법 중에서 확장성을 제공하는 것은 없다. 본 논문에서는 확장적 저널링을 위해 비휘발성 메모리상의 저널 공간을 여러 영역으로 분할하여 한 영역에 집중된 연산을 분산시킨다. 또한, 저널 영역별로 입출력 쓰레드를 두어 저장 장치에 데이터 쓰기 연산을 가속화한다. 제안된 기법을 JFS에 적용하여 고성능 저장장치를 탑재한 멀티코어 서버에서 이를 평가한다. 평가 결과는 제안된 기법이 기존의 NVM 기반 저널링 파일 시스템의 기법보다 성능이 우수함을 보여준다.

매니코어 운영체제 연구현황 및 계획 (Research Status and Plan for Manycore Operating System)

  • 정성인;김태수;민창우;박성용;변석우;서의성;우균;이경우;이재욱;임성수;임은진;조희승;진현욱
    • 전자통신동향분석
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    • 제32권6호
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    • pp.83-95
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    • 2017
  • The trend of manycore hardware has recently evolved more quickly than expected. However, an operating system, which is software used for managing computer resources, is still optimized for a multicore system. To handle this issue, we started a research project called 'Research on High Performance and Scalable Manycore Operating Systems' in 2014. This article briefly examines the technology trends of manycore hardware and operating systems, and introduces the research areas and outcomes during the first stage of the project(2014-2017). The core technologies improving the performance scalability of manycore systems are publicly available, and anyone can use the source code or apply the ideas of the core technique to other research activities. In addition, the research plans of the second stage of the project(2018-2021) are also included.