• Title/Summary/Keyword: multi-step converter

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High Efficiency H-Bridge Multilevel Inverter System Using Bidirectional Switches (양방향 스위치를 이용한 고효율 H-Bridge 멀티레벨 인버터 시스템)

  • Lee, Hwa-Chun;Hwang, Jung-Goo;Kim, Sun-Pil;Choi, Woo-Seok;Lee, Sang-Hyeok;Park, Seong-Mi;Park, Sung-Jun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.10
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    • pp.16-26
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    • 2014
  • This paper proposes new 13-level inverter topology and DC/DC converter buck-boost structure topology for multilevel, compounding uni-directional and bi-directional switches, and proposes high-efficient multilevel inverter system in which the proposed two PCS(Power Conditioning System) was connected in series. In proposed multilevel inverter of forming a output 13-level phase voltage by using total 18 switching parts, Then bi-directional switch has a characteristic of reducing conduction loss and controlling the reactive power effectively by separating electrically from the neutral point. DC/DC converter for supplying in dependent 3 DC voltage to the proposed multi-level inverter generates 180-degree phase shifted PWM by the symmetrically combined structure of 2 buck-boost converter and twice switching frequency efficiency can be obtained, meanwhile, the converter can step up/down the output voltage and 20% output can be generated comparing the input voltage. This proposed system is verified with the simulation and laboratory test.

The Study on Advanced Frequency Up Converter (개선된 주파수 상향 변환기에 관한 연구)

  • Lee, Seung-Dae;Shin, Hyun-Yong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.5
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    • pp.3079-3085
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    • 2014
  • This paper suggests a power level controllable frequency up-converter which is designed and fabricated using both the filtering technology consisted with only passive devices and a multi-level digital attenuator. The suggested frequency up-converter simultaneously realizes the low power consumption and the low cost model. Because of the possibility for controlling power levels, it is possible to use the suggested frequency up-converter for wide spectral range. According to the experimental results, the average gain value of 0.75dB is obtained for the bandwidth of 160MHz at the center frequency of 1,200MHz. Especially, it is confirmed that the power level can be controlled from 10 to -21.5dBm through the digital attenuator.

Hybrid Fuzzy PI-Control Scheme for Quasi Multi-Pulse Interline Power Flow Controllers Including the P-Q Decoupling Feature

  • Vural, Ahmet Mete;Bayindir, Kamil Cagatay
    • Journal of Power Electronics
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    • v.12 no.5
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    • pp.787-799
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    • 2012
  • Real and reactive power flows on a transmission line interact inherently. This situation degrades power flow controller performance when independent real and reactive power flow regulation is required. In this study, a quasi multi-pulse interline power flow controller (IPFC), consisting of eight six-pulse voltage source converters (VSC) switched at the fundamental frequency is proposed to control real and reactive power flows dynamically on a transmission line in response to a sequence of set-point changes formed by unit-step reference values. It is shown that the proposed hybrid fuzzy-PI commanded IPFC shows better decoupling performance than the parameter optimized PI controllers with analytically calculated feed-forward gains for decoupling. Comparative simulation studies are carried out on a 4-machine 4-bus test power system through a number of case studies. While only the fuzzy inference of the proposed control scheme has been modeled in MATLAB, the power system, converter power circuit, control and calculation blocks have been simulated in PSCAD/EMTDC by interfacing these two packages on-line.

High Frame Rate VGA CMOS Image Sensor using Three Step Single Slope Column-Parallel ADCs

  • Lee, Junan;Huang, Qiwei;Kim, Kiwoon;Kim, Kyunghoon;Burm, Jinwook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.22-28
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    • 2015
  • This paper proposes column-parallel three step Single Slope Analog-to-Digital Converter (SS-ADC) for high frame rate VGA CMOS Image Sensors (CISs). The proposed three step SS-ADC improves the sampling rate while maintaining the architecture of the conventional SS-ADC for high frame rate CIS. The sampling rate of the three-step ADC is increased by a factor of 39 compared with the conventional SS-ADC. The proposed three-step SS-ADC has a 12-bit resolution and 200 kS/s at 25 MHz clock frequency. The VGA CIS using three step SS-ADC has the maximum frame rate of 200 frames/s. The total power consumption is 76 mW with 3.3 V supply voltage without ramp generator buffer. A prototype chip was fabricated in a $0.13{\mu}m$ CMOS process.

Output Waveform Improvement of Double-Connected 3-Phase Voltage Source Inverter by Single-Phase Inverter (단상 인버터의 동작에 의한 이중접속 3상 전압원 인버터의 출력파형 개선)

  • 최세완;양승욱
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.1
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    • pp.21-26
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    • 2001
  • This paper proposes a new double-connected 3-phase voltage source inverter with improved output voltage waveform. An auxiliary single-phase inverter injects a ripple voltage into the double-connected inverter to converter 12-step operation to 36-step operation. The KVA rating of the output phase-shifting transformer is reduced by employing a harmonic canceling reactor. The whole rectifier-inverter system including the proposed technique is introduced, and the experimental results are provided.

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Fast Diagnosis Method for Submodule Failures in MMCs Based on Improved Incremental Predictive Model of Arm Current

  • Xu, Kunshan;Xie, Shaojun
    • Journal of Power Electronics
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    • v.18 no.5
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    • pp.1608-1617
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    • 2018
  • The rapid and correct isolation of faulty submodules (SMs) is of great importance for improving the reliability of modular multilevel converters (MMCs). Therefore, a fast diagnosis method containing fault detection and fault location determination was presented in this paper. An improved incremental predictive model of arm current was proposed to detect failures, and the multi-step prediction method was used to eliminate the negative impact of disturbances. Moreover, a control method was proposed to strengthen the fault characteristics to rapidly locate faulty arms and faulty SMs by detecting the variation rate of the SM capacitor voltage. The proposed method can rapidly and easily locate faulty SMs under different load conditions without the need for additional sensors. The experimental results have validated the effectiveness of the proposed method by using a single-phase MMC with four SMs per arm.

A High-Speed CMOS A/D Converter Using an Acquistition-Time Minimization Technique) (정착시간 최소화 기법을 적용한 고속 CMOS A/D 변환기 설계)

  • 전병열;전영득;이승훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.5
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    • pp.57-66
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    • 1999
  • This paper describes a 12b, 50 Msample/s CMOS AID converter using an acquisition-time minimization technique for the high-speed sampling rate of 50 MHz level. The proposed ADC is implemented in a $0.35\mu\textrm{m}$ double-poly five-metal n-well CMOS technology and adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area. The speed limitation of conventional pipelined ADCs comes from the finite bandwidth and resulting speed of residue amplifiers. The proposed acquisition-time minimization technique reduces the acquisition time of residue amplifiers and makes the waveform of amplifier outputs smooth by controlling the operating current of residue amplifiers. The simulated power consumption of the proposed ADC is 197 mW at 3 V with a 50 MHz sampling rate. The chip size including pads is $3.2mm\times3.6mm$.

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A 2.5 V 10b 120 MSample/s CMOS Pipelined ADC with High SFDR (높은 SFDR을 갖는 2.5 V 10b 120 MSample/s CMOS 파이프라인 A/D 변환기)

  • Park, Jong-Bum;Yoo, Sang-Min;Yang, Hee-Suk;Jee, Yong;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.39 no.4
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    • pp.16-24
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    • 2002
  • This work describes a 10b 120 MSample/s CMOS pipelined A/D converter(ADC) based on a merged-capacitor switching(MCS) technique for high signal processing speed and high resolution. The proposed ADC adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area, and employs a MCS technique which improves sampling rate and resolution reducing the number of unit capacitor used in the multiplying digital-to-analog converter (MDAC). The proposed ADC is designed and implemented in a 0.25 um double-poly five-metal n-well CMOS technology. The measured differential and integral nonlinearities are within ${\pm}$0.40 LSB and ${\pm}$0.48 LSB, respectively. The prototype silicon exhibits the signal-to-noise-and-distortion ratio(SNDR) of 58 dB and 53 dB at 100 MSample/s and 120 MSample/s, respectively. The ADC maintains SNDR over 54 dB and the spurious-free dynamic range(SFDR) over 68 dB for input frequencies up to the Nyquist frequency at 100 MSample/s. The active chip area is 3.6 $mm^2$(= 1.8 mm ${\times}$ 2.0 mm) and the chip consumes 208 mW at 120 MSample/s.

A Novel MPPT Control of PV MIC System Considering the Shaded Effect (그림자 영향을 고려한 PV MIC 시스템의 새로운 MPPT 제어)

  • Choi, Jung-Sik;Chung, Dong-Hwa
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.26 no.5
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    • pp.21-33
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    • 2012
  • This paper presents the new maximum power point tracking(MPPT) control of the photovoltaic(PV) module integrated converter(MIC) system considering the shadow influence. The output characteristics of the solar cell is a nonlinear and affected by a temperature, the solar radiation and influence of a shadow. Particularly, MIC system is very sensitive to the shadow influence because the capacity is very small. In order to increase an output and efficiency of the solar power generation, the maximum power point(MPP) obeying control are necessary. Conventional perturbation and observation(PO) and Incremental conductance(IC) are the method finding MPP by the continued self-excitation vibration. The MPPT control is unable to be performed by rapid output change affected by the shadow. To solve this problem, the new control algorithm of the multi-level in which the step value changes by output change is presented. In case there are the solar radiation, a temperature and shadow influence, the presented algorithm treats and compares the conventional control algorithm and output error. In addition, the validity of the algorithm is proved. through the output error response characteristics.

DIGITAL IMAGE PROCESSING AND CLINICAL APPLICATION OF VIDEODENSITOMETER (실험적으로 제작한 Videodensitometer의 디지털 영상처리와 임상적 적용에 관한 연구)

  • Park Kwan-Soo;Lee Sang-Rae
    • Journal of Korean Academy of Oral and Maxillofacial Radiology
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    • v.22 no.2
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    • pp.273-282
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    • 1992
  • The purpose of this study was to propose the utility which was evaluated the digital image processing and clinical application of the videodensitomery. The experiments were performed with IBM-PC/16bit-AT compatible, video camera(CCdtr55, Sony Co., Japan), an color monitor(MultiSync 3D, NEC, Japan) providing the resolution of 512×480 and 64 levels of gray. Sylvia Image Capture Board for the ADC(analog to digital converter) was used, composed of digitized image from digital signal and the radiographic density was measured by 256 level of gray. The periapical radiograph(Ektaspeed EP-21, Kodak Co., U. S. A) which was radiographed dried human mandible by exposure condition of 70 kVp and 48 impulses, was used for primary X-ray detector. And them evaluated for digitzed image by low and high pass filtering, correlations between aluminum equivalent values and the thickness of aluminum step wedge, aluminum equivalent values of sound enamel, dentin, and alveolar bone, the range of diffuse density for gray level ranging from 0 to 255. The obtained results were as follows: 1. The edge between aluminum steps of digitized image were somewhat blurred by low pass filtering, but edge enhancement could be resulted by high pass filtering. Expecially, edge enhancement between distal root of lower left 2nd molar and alveolar lamina dura was observed. 2. The correlation between aluminum equivalent values and the thickness of aluminum step wedge was intimated, yielding the coefficient of correlation r=0.9997(p<0.00l), the regression line was described by Y=0.9699X+0.456, and coefficient of variation amounting to 1.5%. 3. The aluminum equivalent values of sound enamel, dentin, and alvolar bone were 15.41㎜, 12.48㎜, 10.35㎜, respectively. 4. The range of diffuse density for gray level ranging from 0 to 255 was wider enough than that of photodenstiometer to be within the range of 1-4.9.

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