• Title/Summary/Keyword: multi-layered circuit

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Simulations of Frequency-dependent Impedance of Ground Rods Considering Multi-layered Soil Structures

  • Lee, Bok-Hee;Joe, Jeong-Hyeon;Choi, Jong-Hyuk
    • Journal of Electrical Engineering and Technology
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    • v.4 no.4
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    • pp.531-537
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    • 2009
  • Lightning has a broad frequency spectrum from DC to a few MHz. Consequently, the high frequency performance of grounding systems for protection against lightning should be evaluated, with the distributed parameter circuit model in a uniform soil being used to simulate grounding impedances. This paper proposes a simulation method which applies the distributed parameter circuit model for the frequency-dependent impedance of vertically driven ground rods by considering multi-layered soil structures where ground rods are buried. The Matlab program was used to calculate the frequency-dependent ground impedances for two ground rods of different lengths. As a result, an increase of the length of ground rod is not always followed by a decrease of grounding impedance, at least at a high frequency. The results obtained using the newly proposed simulation method considering multi-layered soil structures are in good agreement with the measured results.

A Study on the Digital Implementation of Multi-layered Neural Networks for Pattern Recognition (패턴인식을 위한 다층 신경망의 디지털 구현에 관한 연구)

  • 박영석
    • Journal of the Institute of Convergence Signal Processing
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    • v.2 no.2
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    • pp.111-118
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    • 2001
  • In this paper, in order to implement the multi-layered perceptron neural network using pure digital logic circuit model, we propose the new logic neuron structure, the digital canonical multi-layered logic neural network structure, and the multi-stage multi-layered logic neural network structure for pattern recognition applications. And we show that the proposed approach provides an incremental additive learning algorithm, which is very simple and effective.

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Implementation of the Optimized Via Structure on the Multi-Layered PCB (다층 인쇄회로 기판 (multi-layered PCB)에서의 최적 via 구조의 구현)

  • 김재원;권대한;김기혁;심선일;박정호;황성우
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.341-344
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    • 2000
  • Several new via structures in printed circuit boards are proposed, fabricated and characterized in RF regime. The new structure with a larger inductance component in the bottom layer shows 3㏈ improvement over the conventional structure. The ADS simulation with model parameters extracted from 3D fie]d solver matches with the characterization of these vias

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Equivalent Circuit Modeling of Rosen-type Multilayer Piezoelectric Transformer (Rosen형 적층 압전변압기의 등가회로 모델링)

  • Shin, Hoon-Beom;Lee, Yong-Kuk;Yu, Young-Han;Ahn, Hyung-Keun;Han, Deuk-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.12
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    • pp.1099-1105
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    • 2006
  • In this paper, the equivalent circuit model of a Rosen-type multilayer piezoelectric transformer(MPT) has been proposed based on the Mason's equivalent circuit model and the principle of single layer piezoelectric plate. From the piezoelectric direct and converse effects, the symbolic expressions between the electric inputs and outputs of the MPT have been derived from the equivalent circuit model. A simplified equivalent circuit model of the MPT whose driving part has a single input form has been proposed. The symbolic expressions of the driving part have been derived from the simplified equivalent circuit model and the model was compared with the multi-input equivalent circuit model through the simulation. In the comparisons between the simulation results and the experimental data, output voltage is 630 Vp-p in case of 11-layered MPT and 670 Vp-p for 13-layered MPT over the experiment range. As the load resistance increases, output voltage increases and saturates over $300k{\Omega}$ and the resonant frequency changes from 102 kHz to 103 kHz. The simulation and the experimental results agree well over different load resistances and frequencies.

Empirical Model of Via-Hole Structures in High-Count Multi-Layered Printed Circuit Board (HCML 배선기판에서 비아홀 구조에 대한 경험적 모델)

  • Kim, Young-Woo;Lim, Yeong-Seog
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.12
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    • pp.55-67
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    • 2010
  • The electrical properties of a back drilled via-hole (BDH) without the open-stub and the plated through via-hole (PTH) with the open-stub, which is called the conventional structure, in a high-count multi~layered (HCML) printed circuit board (PCB) were investigated for a high-speed digital system, and a selected inner layer to transmit a high-speed signal was farthest away from the side to mount the component. Within 10 GHz of the broadband frequency, a design of experiment (DOE) methodology was carried out with three cause factors of each via-hole structure, which were the distance between the via-holes, the dimensions of drilling pad and the anti-pad in the ground plane, and then the relation between cause and result factors which were the maximum return loss, the half-power frequency, and the minimum insertion loss was analyzed. Subsequently, the empirical formulae resulting in a macro model were extracted and compared with the experiment results. Even, out of the cause range, the calculated results obtained from the macro model can be also matched with the measured results within 5 % of the error.

Oscillation Characteristics of the Multi-Layered VCO for using 960 MHz Band (960 MHz 다층구조 VCO 발진특성)

  • Rhie, Dong-Hee;Park, Gwi-Nam;Lee, Hun-Yong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.653-656
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    • 2002
  • In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2$ mm(0.11[cc]).

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Design and Manufacture of Step-down Piezoelectric Transformers Multi-layered by Ceramic Sheets (적층형 압전세라믹을 이용한 강압용 압전변압기의 설계 및 제조)

  • 정현호;이원재;김인성;송재성;박태곤
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.680-683
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    • 2001
  • The output characteristics of step-down piezoelectric transformer is changed by a structure of layers. In this paper, we simulated output characteristics of multi-layer piezoelectric transformers with variation of output layers. Also, fabricated piezoelectric transformers were compared with simulated data. From simulated piezoelectric transformers, the output voltage decreased with increasing number of layers. From these results, piezoelectric transformers were made and the output electrical power of the transformers was measured at resonance frequency and at other frequency. The electrical power of transformers was measured on each transformer's resonance mode. However, measured value of 12-layed transformer's output power was smaller than that of 6-layered transformer's one. It is supposed that internal capacitance and reactance of the piezoelectric transformer's were effected in this result. Therefore we need to connect other road resistance and capacitance in output circuit, in order to increase electrical power of transformers.

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Experimental Study on the Improvement of Flexural Strength In Slim Multi-Layer Printed Circuit Boards (Slim Multi-Layer Printed Circuit Boards 의 굽힘 강도 개선에 관한 실험적 연구)

  • Kim, Sang-Mok;Ku, Tae-Wan;Song, Woo-Jin;Kang, Beom-Soo
    • Proceedings of the KSME Conference
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    • 2007.05a
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    • pp.321-325
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    • 2007
  • Recently, demands on thin multi-layer printed circuit boards(PCB) have been rapidly increased with broad spread of personal portable digital appliances such as multi-media. In case of mobile phone, however, the fact that PCBs have low flexural strength might cause defects. The purpose of this study is to improve the flexural strength by substituting the well-known GFRP(glass fiber reinforced plastic) for CFRP(carbon fiber reinforced plastic). Firstly, finite element simulation was carried out using ABAQUS to find out a unique CFRP layer that has a role to sustain the applied forces mainly in PCB. Secondly, three point bending tests were conducted with the newly designed CFRP PCB model to verify the improvement of the flexural strength. Consequently, it is shown that PCB layered with the CFRP on both outer sides of the board can be used to improve the flexural strength effectively.

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Conversion Efficiency of Dye-sensitized Solar Cells Using Multi-layered $TiO_2$ Electrodes (다층구조의 $TiO_2$ 전극을 이용한 염료감응형 태양전지의 변환효율)

  • Byun, Hong-Bock;Yun, Tae-Kwan;Bae, Jae-Young
    • Applied Chemistry for Engineering
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    • v.21 no.3
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    • pp.291-294
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    • 2010
  • Recently, the design of the multi-layered $TiO_2$ electrodes has been attracted for high efficiency of dye-sensitized solar cells. In this study, conversion efficiency of the multi-layered $TiO_2$ electrodes was investigated by using small and large $TiO_2$ nanoparticles. Nanostructured $TiO_2$ powders were prepared by $TiCl_4$ hydrolysis. Differently sized $TiO_2$ powders of which the average diameter was 7.6 and 18 nm were obtained by controlled calcination temperature. It was confirmed that multi-layered $TiO_2$ electrodes significantly influence short-circuit current (Jsc) and also show higher conversion efficiency than dye-sensitized solar cells consisting of each particles.

Computation of the Critical Lengths of the Vertical Grounding Electrode in Multi-Layered Soil Structures (다층 대지구조에서 수직 접지전극의 임계길이 산정)

  • Kim, Ki-Bok;Joe, Jeong-Hyeon;Lee, Bok-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.4
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    • pp.73-80
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    • 2010
  • The grounding impedance is not lowered by expanding the dimension of the grounding electrode, and the length of grounding electrode which shows the minimum value of the grounding impedance for each condition of frequency and soil characteristics is existent, and it is defined as Critical Length. In this paper, a new distributed parameter circuit model considering the condition of the multi-layered soil structures was proposed, and the grounding impedance and critical length of the vertical grounding electrode were analyzed by using the newly proposed simulation model and the MATLAB program. As a consequence, it was found that the effect of the soil structure on the frequency-dependent grounding impedance and critical length of the vertical grounding electrode is significant. It is desirable to consider the soil structure in optimal design of the grounding system.