• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.2
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• pp.432-443
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• 2017

The primary goal of the MPEG-H 3D Audio standard is to provide immersive audio environments for high-resolution broadcasting services such as UHDTV. This standard incorporates a wide range of technologies such as encoding/decoding technology for multi-channel/object/scene-based signal, rendering technology for providing 3D audio in various playback environments, and post-processing technology. The reference software decoder of this standard is a structure combining several modules and can operate in various modes. Each module is composed of independent executable files and executed sequentially, real time decoding is impossible. In this paper, we make DLL library of the core decoder, format converter, object renderer, and binaural renderer of the standard and integrate them to enable frame-based decoding. In addition, by measuring the computation complexity of each mode of the MPEG-H 3D-Audio decoder, this paper also provides a reference for selecting the appropriate decoding mode for various hardware platforms. As a result of the computational complexity measurement, the low complexity profiles included in Korean broadcasting standard has a computation complexity of 2.8 times to 12.4 times that of the QMF synthesis operation in case of rendering as a channel signals, and it has a computation complexity of 4.1 times to 15.3 times of the QMF synthesis operation in case of rendering as a binaural signals.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.6
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• pp.48-56
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• 2010

Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.

• The Journal of the Korea Contents Association
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• v.20 no.8
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• pp.368-374
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• 2020

Journaling file systems (JFS) manage changes of file systems not yet committed in a data structure known as a journal to restore the file system in the event of an unexpected failure. Extra write operations required for journaling negatively affect the performance of JFS. The high-performance and byte-addressable non-volatile memory (NVM) was expected to easily mitigate these performance problems by providing NVM space as journal storage. However, even with such non-volatile memory technologies, performance problems still arise due to scalability problems inherent in processing transactions of JFS. To solve this problem, we proposes a technique for processing file system transactions for scalable performance. To this end, lock-free data structures are used and multiple I/O requests are allowed to simultaneously be processed on high-performance storage devices with multiple I/O channels. We evaluate the file system with the proposed technique by comparing the original ext4 file system and the recent proposed NVM-based journaling file system on a multi-core server, and experimental results show that our file system has better performance (up-to 2.9/2.3 times) than the original ext4 file system and the recent NVM-based journaling file system, respectively.

• Journal of the Institute of Convergence Signal Processing
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• v.15 no.2
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• pp.70-75
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• 2014

Recently, the demand for high-integrated, low-powered, and high-powered SoC design has been increasing due to the multi-functionality and the miniaturization of digital devices and the high capacity of service informations. With the rapid evolution of the system, the required hardware performances have become diversified, the FPGA system has been increasingly adopted for the rapid verification, and SoC system using the FPGA and the ARM core for control has been growingly chosen. While the AXI bus is used in these kinds of systems in various ways, it is traditionally designed with AXI slave structure. In slave structure, there are problems with the CPU resources because CPU is continually involved in the data transfer and can't be used in other jobs, and with the decreased transmission efficiency because the time not used of AXI bus beomes longer. In this paper, an efficient AXI master interface is proposed to solve this problem. The simulation results show that the proposed system achieves reductions in the consumption clock by an average of 51.99% and in the slice by 31% and that the maximum operating frequency is increased to 107.84MHz by about 140%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.773-787
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• 2006

An airborne radar is an essential aviation electronic system for the aircraft to perform various civil and/or military missions in all weather environments. This paper presents the design, development, and test results of the multi-mode X-band pulsed Doppler radar system test model for helicopter-borne flight test. This radar system consists of 4 LRUs(Line-Replacement Unit), which include antenna unit, transmitter and receiver unit, radar signal & data processing unit and display Unit. The developed core technologies include the planar array antenna, TWTA transmitter, coherent I/Q detector, digital pulse compression, MTI, DSP based Doppler FFT filter, adaptive CFAR, moving clutter compensation, platform motion stabilizer, and tracking capability. The design performance of the developed radar system is verified through various ground fixed and moving vehicle test as well as helicopter-borne field tests including MTD(Moving Target Detector) capability for the Doppler compensation due to the moving platform motion.

• The KIPS Transactions:PartD
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• v.13D no.7 s.110
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• pp.1017-1026
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• 2006

Recently, distributed collaborative development environment has been recognized an alternative environment for product development in which multidisciplinary participants are naturally involving. Reuse of Product design information has long been recognized as one of core requirements for efficient product development. This paper addresses an image-based retrieval system to support product design information reuse. In the system, product images obtained from multi-modal devices are utilized to reuse design information. The proposed system conducts the segmentation of a product image by using a labeling method and generates an attributed relational graph (ARG) that represents properties of segmented regions and their relationships. The generated ARG is extended by integrating corresponding part/assembly information. In this manner, the reuse of assembly design information using a product image has been realized. The main advantages of the presented system are following. First, the system is not dependent to specific design tools, because it utilizes multimedia images that can be obtained easily from peripheral devices. Second ratio-based features extracted from images enable image retrievals that contain various sizes of parts. Third, the system has shown outstanding search performance, because we applied various information of segmented part regions and their relationships between parts.

• Korean Journal of Agricultural and Forest Meteorology
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• v.19 no.3
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• pp.153-163
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• 2017

The objective of this study is to enhance the model's speed of estimating weather variables (e.g., minimum/maximum temperature, sunshine hour, PRISM (Parameter-elevation Regression on Independent Slopes Model) based precipitation), which are applied to the Agrometeorological Early Warning System (http://www.agmet.kr). The current process of weather estimation is operated on high-performance multi-core CPUs that have 8 physical cores and 16 logical threads. Nonetheless, the server is not even dedicated to the handling of a single county, indicating that very high overhead is involved in calculating the 10 counties of the Seomjin River Basin. In order to reduce such overhead, several cache and parallelization techniques were used to measure the performance and to check the applicability. Results are as follows: (1) for simple calculations such as Growing Degree Days accumulation, the time required for Input and Output (I/O) is significantly greater than that for calculation, suggesting the need of a technique which reduces disk I/O bottlenecks; (2) when there are many I/O, it is advantageous to distribute them on several servers. However, each server must have a cache for input data so that it does not compete for the same resource; and (3) GPU-based parallel processing method is most suitable for models such as PRISM with large computation loads.

• 대한공업교육학회지
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• v.38 no.1
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• pp.49-67
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• 2013

The purpose of this study is to analyze the external systems and the units 'problem solving and invention' of the middle school technology and home economics 1 textbooks of the revised 2011 national curriculum in an effort to provide some information on the content system of invention education in technology class, as invention education was provided as part of a regular subject for the first time. The findings of the study were as follows: First, 'Technology and Inventions' chapter of Technology and Home Economics 1 Textbooks occupied 10-18% share, with the subchapter of 'Problem Solving and Invention' unit taking up 6.7-29% of the textbooks. Second, for most textbooks, 'Technological Problem Solving', 'Idea Generation' 'Multi-dimensional Projection Method', 'Expansive Thought-Processing Methodology', 'Converging Thought Methodology' and 'Invention in Everyday Lives' were included as main contents based on the accomplishment criteria presented in education process interpretation documents. Third, the detailed structures were generally made up as follows: Introduction (Broad Chapter Title, Subchapter Table of Contents, Introduction, Subchapter Title, Study Objectives, Open Thinking); Development (Unit Title, Thinking Ahead, Core Terms, Main Text, Study Helper, Activities, Research Exercises, Supplemental Readings, In-depth Study Topics, Technology in Everyday Lives, Reading Topics, Discussion Topics, and Career Helpers); and Summary (Subchapter Summary, Study Summary, Terms Summary, Writing Follow-up, Self Review, Broad Chapter Evaluation). Fourth, based on the analysis of figures included, photographs had the largest share, followed by figures, tables, and graphs. The photos were used to illustrate various inventions, invention methodologies, and exercise activities, while figures were included to depict the contents included in the main text, and the tables to assist to preparation of process diagrams or materials lists. Fifth, based on the analysis of content weights, greater weights were placed on 'Inventions and Thoughts', and 'Invention Experiment Activities,' while 'Understanding Inventions' and 'Invention and Patents' chapters did not have a lot of texts involved. Sixth, based on the analysis of content presentation methods, most textbooks combined figures, tables, illustrations and texts to discuss the topics. Based on the above study results, we suggest the following: First, a consistent education curriculum should be developed over the topic of invention; and second, more precise and systematic analysis of textbooks would need to be performed.