• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.361.2-361.2
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• 2016

The manufacture of organic electronic circuits requires effective heterogeneous integration of different nanoscale organic materials with uniform morphology and crystallinity in a desired arrangement on a substrate. Herein, we present a new direct printing method, which enables monolithic integration of crystalline nanowire arrays with a diverse range of organic materials. In this method, we use a nanoscale patterned soft mold, which contains an assembly of simple nanoline patterns but, in combination with droplet of various organic inks, can produce a large-scale integration of various nanopatterns with multiple kinds of organic materials. The morphology of organic nanowires can controlled by nanoconfinement in nanoline of mold. And mutual alignment of nanopatterns can be controlled by adjusting the ink droplet size, number of droplets, ink deposition locations.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.5
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• pp.370-374
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• 1991

A high performance fully ion-implanted InP JFET was characterized for high speed switching elements. The switch has an insertion loss of 5.5dB with 31.6dB isolation at 1GHz. This device can effectively swithc a byte-multiplexed 2Gb/s signal and an eye-diagram taken at 2Gb/s shows an error-free eye pattern. Therefore, this device can be used as a switching element for high transmission data rate for monolithic integration of optoelectronic circuit in the long-wavelength region.

• Journal of information and communication convergence engineering
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• v.15 no.4
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• pp.232-236
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• 2017

A digital vacuum pressure sensor is designed, fabricated, and characterized using a packaged MEMS analog Pirani gauge. The packaged MEMS analog Pirani gauge requires a current source to heat up a heater in the Pirani gauge. To investigate the feasibility of digitization for the analog Pirani gauge, its implementation is performed with a zero-temperature coefficient current source and microcontroller that are commercially available. The measurement results using the digital vacuum pressure sensor showed that its operating range is 0.05-760 Torr, which is the same as the measurement results of the packaged MEMS analog pressure sensor. The results confirm that it is feasible to integrate the analog Pirani gauge with a commercially available current source and microcontroller. The successful hybrid integration of the analog Pirani gauge and digital circuits is an encouraging result for monolithic integration with a precision current source and ADCs in the state of CMOS dies.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.68.2-68.2
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• 2012

We present a scheme for monolithically integrating aligned arrays of single walled carbon nanotubes (SWNTs) with sheets of graphene, for use in electronic devices. Here, the graphene and arrays of SWNTs are formed separately, using chemical vapor deposition techniques onto different, optimized growth substrates. Techniques of transfer printing provide a route to integration, yielding two terminal devices and transistors in which patterned structures of graphene form the electrodes and the SWNTs arrays serve as the semiconductor. Electrical testing and analysis reveal the properties of optically transparent transistors that use this design, thereby giving insights into the nature of contacts between graphene and SWNTs.

• Electronics and Telecommunications Trends
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• v.36 no.3
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• pp.23-33
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• 2021

Two main technologies of III-V/Si laser diode for optical communication, direct epitaxial growth, and wafer bonding were studied. Until now, the wafer bonding has been vigorously studied and seems promising for the ideal III-V/Si laser. However, the wafer bonding process is still complicated and has a limit of mass production. The development of a concise and innovative integration method for silicon photonics is urgent. In the future, the demand for high-speed data processing and energy saving, as well as ultra-high density integration, will increase. Therefore, the study for the hetero-junction, which is that the III-V compound semiconductor is directly grown on Si semiconductor can overcome the current limitations and may be the goal for the ideal III-V/Si laser diode.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.7
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• pp.49-59
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• 2014

Effects of the dielectric constant and thickness of a feed substrate on the bandwidth and radiation characteristics of an aperture coupled microstrip patch antenna (ACMPA) are investigated. The optimized return loss bandwidth of an ACMPA increases without the degradation of radiation characteristics as the feed substrate dielectric constant increases for the same feed substrate thickness. The optimized return loss bandwidth of an ACMPA with the dielectric constant of a feed substrate of 10, which is compatible with the high dielectric constant monolithic microwave integrated circuit (MMIC) materials, increases without the degradation of radiation characteristics as the thickness of a feed substrate decreases. The ACMPA configuration is suitable for integration with MMICs.

• Journal of the Korea Society for Simulation
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• v.20 no.3
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• pp.19-28
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• 2011

Adaptive Random Testing (ART) aims to enhance the performance of pure random testing by detecting failure region in a software. The ART algorithm generates effective test cases which requires less number of test cases than that of pure random testing. However, all ART algorithms currently proposed are designed for the tests of monolithic system or unit level. In case of integrated system tests, ART approaches do not achieve same performances as those of ARTs applied to the unit or monolithic system. In this paper, we propose an extended ART algorithm which can be applied to the integrated system testing environment without degradation of performance. The proposed approach investigates an input distribution of the unit under a test with limited number of seed input data and generates information to be used to resizing input domain partitions. The simulation results show that our approach in an integration environment could achieve similar level of performance as an ART is applied to a unit testing. Results also show resilient effectiveness for various failure rates.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1666-1671
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• 1989

A novel switched-capacitor circuit for interfacing capacitive microtransducers with a digital system is developed based on the dual-slope integration. It consists of a differential integrator and a comparator. Driven by the teo phase clock, the circuit first senses the capacitance difference between the transducer and the reference capacitor in the form of charge, and accumulates it into the feedback capabitor of the integrator for a fixed period of time. The resulant accumulated charge is next extracted by the known reference charge until the integrator output voltage refurns to zero. The length of time required for the integrator output to return to zero, as measured by the number of clock cycle gated into a counter is proportional to the capacitance difference, averaged over the integration period. The whole operation is insensitive to the reference voltage and the capacitor values involved in the circuit, Thus the proposed circuit permits an accurate differental capacitance measurement. An error analysis has showh that the resolution as high as 8 bits can be expected by realizing the circuit in a monolithic MOS IC form. Besides the accuracy, it features the small device count integrable onto a small chip area. The circuit is thus particularly suitadble for the on-chip interface.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.203-207
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• 1999

In this paper we report new integration technology developed for three-dimensional metallic microstructures in an arbitrary shape. We have developed the two fabrication methods: Multi-Exposure and Single-Development (MESD) and Sacrificial Metallic Mold(SMM) techniques. Three-dimensional photoresist mold can be formed by the MESD method while unlimited number of structural levels can be realized by the SMM technique. Using these two techniques we have fabricated solenoid inductors and levitated spiral inductors for RF applications. We have achieved peak Q- factors over 40 in the 2-10㎓ range, the highest number among the inductors reported to date. Finally, we propose "On-Chip Passives" as a post IC process for monolithic integration of inductors, tunable capacitors, microwave switches, transmission lines, and mixers and filters toward future single-chip transceiver integration.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.2
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• pp.138-143
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• 2003

A double spiral thin-film inductor with a NiFe magnetic core is integrated with DC-DC converter IC. The NiFe core is deposited on a polyimide film as the thinckness of NiFe is 2.5~3.5 ${\mu}$m. Then, copper conductor line is deposited on the NiFe core with double spiral structure. Process integration is performed by sequential processes of etching the polyimide film deposited both top and bottom of the NiFe core and electroplation copper conductor line from exposed metal pad of the DC-DC converter IC. Process integration is simplified by elimination planarization process for top core because the proposed thin-film inductor has a bottom NiFe core only. Inductor of the fabricated monolithic DC-DC converter IC is 0.53 ${\mu}$H when the area of converter IC and thin-film inductor are 5X5$\textrm{mm}^2$ and 3.5X2.5$\textrm{mm}^2$, respectively. The efficiency is 72% when input voltage and output voltage are 3.5 V and 6 V, respectively at the operation frequency of 8 MHz.