• Journal of the Semiconductor & Display Technology
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• v.17 no.4
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• pp.66-69
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• 2018

This study was researched the electrical properties of semiconductor devices such as ITO, $SiO_2$, $V_2O_5$ thin films. The films of ITO, $SiO_2$, $V_2O_5$ were deposited by the rf magnetron sputtering system with mixed gases of oxygen and argon to generate the plasma. All samples were cleaned before deposition and prepared the metal electrodes to research the current-voltage properties. The electrical characteristics of semiconductors depends on the interface's properties at the junction. There are two kinds of junctions such as ohmic and schottky contacts in the semiconductors. In this study, the ITO thin film was shown the ohmic contact properties as the linear current-voltage curves, and the electrical characteristics of $SiO_2$ and $V_2O_5$ films were shown the non-linear current-voltage curves as the schottky contacts. It was confirmed that the electronic system with schottky contacts enhanced the electronic flow owing to the increment of efficiency and increased the conductivity. The schottky contact was only defined special characteristics at the semiconductor and the interface depletion layer at the junction made the schottky contact which has the effect of leakage current cutoff. Consequently the semiconductor device with shottky contact increased the electronic current flow, in spite of depletion of carriers.

• Applied Science and Convergence Technology
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• v.26 no.3
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• pp.47-49
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• 2017

Photocurrent enhancement has been investigated in monolayer (1L) $MoS_2$ with PbS quantum dots (QDs). A metal-semiconductor-metal (Au-1L $MoS_2$-Au) junction device is fabricated using a standard photolithography method. Considerably improved photo-electrical properties are obtained by coating PbS QDs on the Au-1L $MoS_2$-Au device. Time dependent photoconductivity and current-voltage characteristics are investigated. For the QDs-coated $MoS_2$ device, it is observed that the photocurrent is considerably enhanced and the decay life time becomes longer. We propose that carriers in QDs are excited and transferred to the $MoS_2$ channel under light illumination, improving the photocurrent of the 1L $MoS_2$ channel. Our experimental findings suggest that two-dimensional layered semiconductor materials combined with QDs could be used as building blocks for highly-sensitive optoelectronic detectors including radiation sensors.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.86-86
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• 2012

The new approaches for silicon solar cell of new concept have been actively conducted. Especially, solar cells with wire array structured radial p-n junctions has attracted considerable attention due to the unique advantages of orthogonalizing the direction of light absorption and charge separation while allowing for improved light scattering and trapping. One-dimenstional semiconductor nano/micro structures should be fabricated for radial p-n junction solar cell. Most of silicon wire and/or pillar arrays have been fabricated by vapour-liquid-solid (VLS) growth because of its simple and cheap process. In the case of the VLS method has some weak points, that is, the incorporation of heavy metal catalysts into the growing silicon wire, the high temperature procedure. We have tried new approaches; one is electrochemical etching, the other is noble metal catalytic etching method to overcome those problems. In this talk, the silicon pillar formation will be characterized by investigating the parameters of the electrochemical etching process such as HF concentration ratio of electrolyte, current density, back contact material, temperature of the solution, and large pre-pattern size and pitch. In the noble metal catalytic etching processes, the effect of solution composition and thickness of metal catalyst on the etching rate and morphologies of silicon was investigated. Finally, radial p-n junction wire arrays were fabricated by spin on doping (phosphor), starting from chemical etched p-Si wire arrays. In/Ga eutectic metal was used for contact metal. The energy conversion efficiency of radial p-n junction solar cell is discussed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.31-39
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• 2001

W polymetal gate technology for giga bit DRAM are presented. Key module processes for polymetal gate are studied in detail. $W/WN_x/poly-silicon$ adopted for a word line of 256Mbit DRAM has good gate oxide integrity and junction leakage characteristics through full integration, which is comparable to those of conventional $WSi_x$/Poly-silicon gate process. These results undoubtedly show that $W/WN_x/poly-silicon$ is the strongest candidate as a word line for Giga bit DRAM.

• Journal of IKEEE
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• v.22 no.3
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• pp.565-569
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• 2018

For the conventional power MOSFET (metal-oxide semiconductor field-effect transistor) device structure, there exists a tradeoff relationship between specific on-state resistance (Ron,sp) and breakdown voltage (BV). In order to overcome this tradeoff, a super-junction (SJ) trench MOSFET (TMOSFET) structure with uniform or non-uniform doping concentration, which decreases linearly in the vertical direction from the N drift region at the bottom to the channel at the top, for an optimal design is suggested in this paper. The on-state resistance of $0.96m{\Omega}-cm2$ at the SJ TMOSFET is much less than that at the conventional power MOSFET under the same breakdown voltage of 100V. A design methodology for the edge termination is proposed to achieve the same breakdown voltage and on-state resistance as the main body of the super-junction TMOSFET by using of the SILVACO TCAD 2D device simulator, Atlas.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.11
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• pp.683-689
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• 2015

For the formation of $N^+$ doping, the antimony ions are mainly used for the fabrication of a BJT (bipolar junction transistor), CMOS (complementary metal oxide semiconductor), FET (field effect transistor) and BiCMOS (bipolar and complementary metal oxide semiconductor) process integration. Antimony is a heavy element and has relatively a low diffusion coefficient in silicon. Therefore, antimony is preferred as a candidate of ultra shallow junction for n type doping instead of arsenic implantation. Three-dimensional (3D) profiles of antimony are also compared one another from different tilt angles and incident energies under same dimensional conditions. The diffusion effect of antimony showed ORD (oxygen retarded diffusion) after thermal oxidation process. The interfacial effect of a $SiO_2/Si$ is influenced antimony diffusion and showed segregation effects during the oxidation process. The surface sputtering effect of antimony must be considered due to its heavy mass in the case of low energy and high dose conditions. The range of antimony implanted in amorphous and crystalline silicon are compared each other and its data and profiles also showed and explained after thermal annealing under inert $N_2$ gas and dry oxidation.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.389.2-389.2
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• 2016

The flexible solid state device has been widely studied as portable and wearable device applications such as display, sensor and curved circuits. A zero-bias operation without any external power consumption is a highly-demanding feature of semiconductor devices, including optical communication, environment monitoring and digital imaging applications. Moreover, the flexibility of device would give the degree of freedom of transparent electronics. Functional and transparent abrupt p/n junction device has been realized by combining of p-type NiO and n-type ZnO metal oxide semiconductors. The use of a plastic polyethylene terephthalate (PET) film substrate spontaneously allows the flexible feature of the devices. The functional design of p-NiO/n-ZnO metal oxide device provides a high rectifying ratio of 189 to ensure the quality junction quality. This all transparent metal oxide device can be operated without external power supply. The flexible p-NiO/n-ZnO device exhibit substantial photodetection performances of quick response time of $68{\mu}s$. We may suggest an efficient design scheme of flexible and functional metal oxide-based transparent electronics.

• Journal of Radiation Industry
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• v.8 no.3
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• pp.141-146
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• 2014

Nickel (Ni) electroplating was implemented by using a metal Ni powder in order to establish a $^{63}Ni$ plating condition on the PN junction semiconductor needed for production of beta-voltaic battery. PN junction semiconductors with a Ni seed layer of 500 and $1000{\AA}$ were coated with Ni at current density from 10 to $50mA\;cm^{-2}$. The surface roughness and average grain size of Ni deposits were investigated by XRD and SEM techniques. The roughness of Ni deposit was increased as the current density was increased, and decreased as the thickness of Ni seed layer was increased. The results showed that the optimum surface shape was obtained at a current density of $10mA\;cm^{-2}$ in seed layer with thickness of $500{\AA}$, $20mA\;cm^{-2}$ of $1000{\AA}$. Also, pure Ni deposit was well coated on a PN junction semiconductor without any oxide forms. Using the line width of (111) in XRD peak, the average grain size of the Ni thick firm was measured. The results showed that the average grain size was increased as the thickness of seed layer was increased.

• ETRI Journal
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• v.34 no.1
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• pp.134-137
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• 2012

Power metal-oxide semiconductor field-effect transistor (MOSFET) devices are widely used in power electronics applications, such as brushless direct current motors and power modules. For a conventional power MOSFET device such as trench double-diffused MOSFET (TDMOS), there is a tradeoff relationship between specific on-state resistance and breakdown voltage. To overcome the tradeoff relationship, a super-junction (SJ) trench MOSFET (TMOSFET) structure is studied and designed in this letter. The processing conditions are proposed, and studies on the unit cell are performed for optimal design. The structure modeling and the characteristic analyses for doping density, potential distribution, electric field, width, and depth of trench in an SJ TMOSFET are performed and simulated by using of the SILVACO TCAD 2D device simulator, Atlas. As a result, the specific on-state resistance of 1.2 $m{\Omega}-cm^2$ at the class of 100 V and 100 A is successfully optimized in the SJ TMOSFET, which has the better performance than TDMOS in design parameters.

• Journal of IKEEE
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• v.19 no.2
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• pp.232-236
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• 2015

Super-junction trench MOSFET (SJ TMOSFET) devices are well known for lower specific on-resistance and high breakdown voltage (BV). For a conventional power MOSFET (metal-oxide semiconductor field-effect transistor) such as trench double-diffused MOSFET (TDMOSFET), there is a tradeoff relationship between specific on-state resistance and breakdown voltage. In order to overcome the tradeoff relationship, a SJ TMOSFET structure is suggested, but sensing the temperature distribution of TMOSFET is very important in the application since heat is generated in the junction area affecting TMOSFET. In this paper, analyzing the temperature characteristics for different number bonding for SJ TMOSFET with an embedded temperature sensor is carried out after designing the diode temperature sensor at the surface of SJ TMOSFET for the class of 100 V and 100 A for a BLDC motor.