• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.1-9
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• 2011

Memristor is a portmanteau of "memory resistor". The resistance of memristor is changed depends on the history of electric charge that passed through the device and it is able to memorize the last resistance after turning off the power supply. This paper presents this device that has a high chance to be the next generation of commercial non-volatile memory and its behavior modeling using SPICE simulation. The memristor MOS content addressable memory (M_CAM) is also designed and simulated using the proposed behavioral model. The proposed M_CAM unit cell area and power consumption show an improvement around 40% and 96%, respectively, compare to the conventional SRAM based CAMs. The M_CAM layout is also implemented using 0.13${\mu}m$ mixed-signal CMOS process under 1.2 V supply voltage.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.4
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• pp.80-87
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• 2015

Memristor is a new kind of memory device whose resistance varies depending upon applied charge and whose previous resistance state is preserved even when its power is off. Ordinary memristor has a nonlinear programming characteristics about time when a constant voltage is applied. For the easiness of programming, it is desirable that resistance is programmed linearly about time. We had proposed previously a memristor bridge configuration with which weight can be programmed nicely in positive, negative or zero. In memristor bridge circuit, two memristors are connected in series with different polarity. Memristors are complementary each other and it follows that the memristance variation is linear with respect to time. In this paper, the linearization effect of weight programming of memristor bridge synapse is investigated and verified about both $TiO_2$ memristor from HP and a nonlinear memristor with a window function. Memristor bridge circuit would be helpful to conduct synaptic weight programming.

• Journal of the Korean Institute of Intelligent Systems
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• v.26 no.5
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• pp.368-374
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• 2016

This paper presents an experimental study on an electrical circuit model of the TiO2-based nano-wired memristor device for neuromophic applications. The electrical circuit equivalent model of the proposed memristor device consists of several electronics components and some passive devices including operational amplifiers, multipliers, resistors and capacitors. In order to verify the proposed design, both of simulation (using PSPICE) as well as hardware implementation were performed for the analysis of the memristor circuit with time waveforms, frequency spectra, I-V curves and power curves. The gained results from the measured data showed a good agreement with the simulation result that confirm the proposed idea.

• Journal of IKEEE
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• v.18 no.2
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• pp.228-233
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• 2014

In this paper, we propose a CMOS-memristor hybrid circuit that can perform 4-bit multiplication for future energy-efficient computing in nano-scale digital systems. The proposed CMOS-memristor hybrid circuit is based on the parallel architecture with AND and OR planes. This parallel architecture can be very useful in improving the power-delay product of the proposed circuit compared to the conventional CMOS array multiplier. Particularly, from the SPECTRE simulation of the proposed hybrid circuit with 0.13-mm CMOS devices and memristors, this proposed multiplier is estimated to have better power-delay product by 48% compared to the conventional CMOS array multiplier. In addition to this improvement in energy efficiency, this 4-bit multiplier circuit can occupy smaller area than the conventional array multiplier, because each cross-point memristor can be made only as small as $4F^2$.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.166-171
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• 2023

This paper presents the synaptic characteristics of IGZO memristors in neuromorphic computing, using MATLAB/Simulink and NeuroSim. In order to investigate the variations in the conductivity of IGZO memristor and the corresponding changes in the hidden layer, simulations are conducted by using the MNIST dataset. It was observed from simulation results that the recognition accuracy could be dependent on various parameters of IGZO memristor, along with the experimental exploration. Moreover, we identified optimal parameters to achieve high accuracy, showing an outstanding accuracy of 96.83% in image classification.

• Journal of IKEEE
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• v.17 no.3
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• pp.324-331
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• 2013

In this paper, we implemented memristor emulator circuit on Printed Circuit Board (PCB) and observed the inherent pinched hysteresis characteristic of memristors by measuring the emulator circuit on PCB. The memristor emulator circuit implemented on PCB is composed of simple discrete devices not using any complicated circuit blocks thus we can integrate the memristor emulator circuits in very small layout area on Silicon substrate. The programmable gain amplifier is designed using the proposed memristor emulator circuit and verified that the amplifier's voltage gain can be controlled by programming memristance of the emulator circuit by circuit simulation. Threshold switching is also realized in the proposed emulator circuit thus memristance can remain unchanged when the input voltage applied to the emulator circuit is lower than VREF. The memristor emulator circuit and the programmable gain amplifier using the proposed circuit can be useful in teaching the device operation, functions, characteristics, and applications of memristors to students when thet cannot access to device and fabrication technologies of real memristors.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.174-174
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• 2014

Memristor devices are one of the most promising candidate approaches to next-generation memory technologies. Memristive switching phenomena usually rely on repeated electrical resistive switching between non-volatile resistance states in an active material under the application of an electrical stimulus, such as a voltage or current. Recent reports have explored the use of variety of external operating parameters, such as the modulation of an applied magnetic field, temperature, or illumination conditions to activate changes in the memristive switching behaviors. Among these possible choices of signal controlling factors of memristor, photon is particularly attractive because photonic signals are not only easier to reach directly over long distances than electrical signal, but they also efficiently manage the interactions between logic devices without any signal interference. Furthermore, due to the inherent wave characteristics of photons, the facile manipulation of the light ray enables incident light angle controlled memristive switching. So that, in the tautological sense, device orienting position with regard to a photon source determines the occurrence of memristive switching as well. To demonstrate this position controlled memory device functionality, we have fabricated a metal-semiconductor-metal memristive switching nanodevice using ZnO nanorods. Superhydrophobicity employed in this memristor gives rise to illumination direction selectivity as an extra controlling parameter which is important feature in emerging. When light irradiates from a point source in water to the surface treated device, refraction of light ray takes place at the water/air interface because of the optical density differences in two media (water/air). When incident light travels through a higher refractive index medium (water; n=1.33) to lower one (air; n=1), a total reflection occurs for incidence angles over the critical value. Thus, when we watch the submerged NW arrays at the view angles over the critical angle, a mirror-like surface is observed due to the presence of air pocket layer. From this processes, the reversible switching characteristics were verified by modulating the light incident angle between the resistor and memristor.

• Journal of IKEEE
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• v.27 no.1
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• pp.25-29
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• 2023

Effect of the processes of polysilazane solid electrolyte layer and silver (Ag) active electrode on the electrical characteristics of memristor was investigated. The memristor with the solid electrolyte annealed at higher temperature exhibited the higher set voltage and better memory retention characteristics than that annealed at lower temperature. The increase in the set voltage and the improvement of the memory retention characteristic at high annealing temperature were attributed to a reduction in the void density and an increase in the void uniformity inside the solid electrolyte, respectively. In the case where the polysilazane solution's concentration is high, the memristor exhibited rapid degradation of low resistive state even annealed at high temperature. Lastly, it was shown that the memristor with the solution-processed Ag active electrode showed WORM property unlike that with the vacuum-processed Ag active electrode. The WORM property was possibly due to morphological defects present in the solution-processed Ag active electrode.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.6
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• pp.685-694
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• 2015

In this paper, a new dynamic reference scheme is proposed to improve the read voltage margin better than the previous static reference scheme. The proposed dynamic reference scheme can be helpful in compensating not only the background pattern dependence but also the cell position dependence. The proposed dynamic reference is verified by simulating the CMOS-memristor hybrid circuit using the practical CMOS SPICE and memristor Verilog-A models. In the simulation, the percentage read voltage margin is compared between the previous static reference scheme and the new dynamic reference scheme. Assuming that the critical percentage of read voltage margin is 5%, the memristor array size with the dynamic scheme can be larger by 60%, compared to the array size with the static one. In addition, for the array size of $64{\times}64$, the interconnect resistance in the array with the dynamic scheme can be increased by 30% than the static reference one. For the array size of $128{\times}128$, the interconnect resistance with the proposed scheme can be improved by 38% than the previous static one, allowing more margin on the variation of interconnect resistance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.5
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• pp.1-9
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• 2012

Memristor which is known as fourth basic circuit element has been developed recently but its electrical characteristics are not still fully understood. Memristor has the incremental and decremental feature of the resistance depending upon the connected polarities. Also, its operational behavior become diverse depending on its connection topologies. In this work, electrical characteristics of diverse types of serial and parallel connections are investigated using the HP $TiO_2$ model. The characteristics are analyzed with pinched hystersis loops on the V-I plane when sine input signal is applied. The results of the work would be utilized usefully for analyzing the characteristics of memristor element and applications to logic circuit and neuron cells.