• Journal of the Korea Society of Computer and Information
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• v.22 no.3
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• pp.1-8
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• 2017

In this paper, we propose a new hybrid wear leveling technique for NAND Flash memory, called Time-Aware Wear Leveling (TAWL). Our proposal prolongs the lifetime of NAND Flash memory by using dynamic wear leveling technique which considers the wear level of hot blocks as well as static wear leveling technique which considers the wear level of the whole blocks. TAWL also reduces the overhead of garbage collection by separating hot data and cold data using update frequency rate. We showed that TAWL enhanced the lifetime of NAND flash memory up to 220% compared with previous wear leveling techniques and our technique also reduced the number of copy operations of garbage collections by separating hot and cold data up to 45%.

• Spatial Information Research
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• v.20 no.5
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• pp.67-76
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• 2012

Recently the mobile DBMS (Database Management System) is popular to store and manage large data in a mobile device. Especially, the research and development about mobile storage structure and querying method for navigation map data in a mobile device have been performed. The performance of the mobile DBMS in which random data accesses are most queries if the NAND flash memory is used as storage media of the DBMS is degraded. The reason is that the performance of flash memory is good in writing sequentially but bad in writing randomly as the features of the NAND flash memory. So, new storage structure and querying policies of the mobile DBMS are needed in the mobile DBMS in which a flash memory is used as storage media. In this paper, we have studied the policy of the database page management to enhance the performance of the frequent random update and applied this policy to the navigation-specialized mobile DBMS which supports incremental map update. And also we have evaluated the performance of this policy by experiments.

• Journal of Internet of Things and Convergence
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• v.8 no.5
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• pp.33-39
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• 2022

A storage device used in the mobile computing field should have low power, light weight, durability, etc., and should be able to effectively store and manage large-capacity data generated by users. NAND flash memory is mainly used as a storage device in the field of mobile computing. Due to the structural characteristics of NAND flash memory, it is impossible to overwrite in place when a data update request is made, so it can be solved by accurately separating requests that frequently request data update and requests that do not, and storing and managing them in each block. The classification method for such a data update request is called a hot data identification method, and various studies have been conducted at present. This paper continuously records the occurrence of data update requests using a counting filter for more accurate hot data validation, and also verifies hot data by considering how often the requested update requests occur during a specific time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38C no.3
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• pp.311-317
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• 2013

In this paper, we proposed high speed LDPC decoding algorithm based on DVB-S2 standard for applying marine communications in order to multimedia transmission. For implementing the high speed LDPC decoder, HSS algorithm which reduce the iteration numbers without performance degradation is applied. In HSS algorithm, check node update units are update at the same time of bit node update. HSS can be accelerated to the decoding speed because it does not need to separate calculation of the bit nodes, However, check node calculation blocks need many clocks because of just one memory is used. Therefore, this paper proposed partial memory structure in order to reduced the delay and high speed decoder is possible. The results of the simulation, when the max number of iteration set to 30 times, decoding throughput of HSS algorithm is 326 Mbit/s and decoding speed of proposed algorithm is 2.29 Gbit/s. So, decoding speed of proposed algorithm more than 7 times could be obtained compared to the HSS algorithm.

• Journal of Korea Society of Industrial Information Systems
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• v.16 no.1
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• pp.37-48
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• 2011

Sensor networks monitor the environment, collect sensed data, and relay the data back to a collection point. Although sensor nodes have very limited hardware resources, they require an operating system that can provide efficient resource management and various application environments. In addition, the wireless sensor networks require the code update previously deployed to patch bugs in program and to improve performance of kernel service routines and application programs. This paper presents EPRCU (Easy to Perform Remote Code Update), a new operating system for wireless sensor nodes, which has enhanced functionalities to perform remote code update. To achieve an efficient code update, the EPRCU provides dynamic memory allocation and program memory management. It supports the event-driven kernel, which uses priority-based scheduling with the application of aging techniques. Therefore, the proposed operating system is not only easy to perform wireless communication with the remote code update but also suitable for various sensor network applications.

• Journal of the Korea Society of Computer and Information
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• v.20 no.4
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• pp.1-10
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• 2015

NAND flash systems require deletion operation and do not support in-place update, so the storage systems should use Flash Translation Layer (FTL). However, there are a lot of memory consumptions using mapping table in the FTL, so recently, many studies have been proposed to resolve mapping table overhead. These studies try to solve update propagation problem in the nand flash system which does not use mapping table. In this paper, we present a novel index structure, called CL-Tree(Cache List Tree), to solve the update propagation problem. The proposed index structure reduces write operations which occur for an update propagation, and it has a good performance for search operation because it uses multi-list structure. In experimental evaluation, we show that our scheme yields about 173% and 179% improvement in insertion speed and search speed, respectively, compared to traditional B+tree and other works.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.5
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• pp.269-277
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• 2018

NAND flash memory has widely been used because of non-volatility, low power consumption and fast access time. However, it suffers from inability to provide update-in-place and the erase cycle is limited. The unit of read/write operation is a page and the unit of erase operation is a block. Moreover erase operation is slower than other operations. We proposed the Adaptive Garbage Collection (called "AGC") policy which focuses on not only reducing garbage collection process time for real-time guarantee but also wear-leveling for a flash memory lifetime. The AGC performs better than Cost-benefit policy and Greedy policy. But the AGC does not consider the operation characteristics. So we proposed the Advanced Adaptive Garbage Collection (called "A-AGC") policy which considers the page write operation count and block erase operation count. The A-AGC reduces the write operations by considering the data update frequency and update data size. Also, it reduces the erase operations by considering the file fragmentation. We implemented the A-AGC policy and measured the performance compared with the AGC policy. Simulation results show that the A-AGC policy performs better than AGC, specially for append operation.

• Proceedings of the Korean Information Science Society Conference
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• 2000.10a
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• pp.210-212
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• 2000

In this paper, we present a comcurrency control scheme over the index structure in main memory databases using multiversion mechanism, and implement it on T-tree. As a well-known idea for comcurrency control, multiversion allows multiple transactions to reat and write different versions of the same data item, each transaction sees a consistent set of versions for all the data items it accesses[1]. Logical versioning and physical versioning techniques are used to keep versions of data item and versions of index node respectively. The main features of this multiversion indexing approach are (1)update operations and rotations on T-tree can take place concurrently, (2)the number of locking and latching requirement is sharply reduced because read-only transactions do not obtain any locks or latches and update transactions obtain latches only when actually performing the update, (3)it reduces storage overhead for tracking version and reclaims storage in time, and (4)it provides complete isolation of read-only transactions from update transactions, so the read-only transactions can get response information without any block.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.9
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• pp.2041-2047
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• 2013

In this paper, we proposed high speed LDPC decoding algorithm based on DVB-S2 standard. For implementing the high speed LDPC decoder, HSS algorithm which reduce the iteration numbers without performance degradation is applied. In HSS algorithm, check node update units are update at the same time of bit node update. HSS can be accelerated to the decoding speed because it does not need to separate calculation of the bit nodes, However, check node calculation blocks need many clocks because of just one memory is used. Therefore, this paper proposed dc-split memory structure in order to reduced the delay and high speed decoder is possible. Finally, this paper presented maximum split memory and throughput for various coding rates in DVB-S2 standard.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.2
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• pp.125-134
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• 2016

NAND flash memory has unique characteristics like as 'out-place-update' and limited lifetime compared with traditional storage systems. According to out-of-place update scheme, a number of invalid (or called dead) pages can be generated. In this case, garbage collection is needed to reclaim invalid pages. Because garbage collection results in not only erase operations but also copy operations of valid (or called live) pages to other blocks, many garbage collection techniques have proposed to reduce the overhead and to increase the lifetime of NAND Flash systems. This techniques sometimes select victim blocks including cold data for the wear leveling. However, most of them overlook the cost of selecting victim blocks including cold data. In this paper, we propose a garbage collection technique named CAPi (Cost Age with Proportion of invalid pages). Considering the additional overhead of what to select victim blocks including cold data, CAPi improves the response time in garbage collection and increase the lifetime in memory systems. Additionally, the proposed scheme also improves the efficiency of garbage collection by separating cold data from hot data in valid pages. In experimental evaluation, we showed that CAPi yields up to, at maximum, 73% improvement in lifetime compared with existing garbage collections.