• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.114-121
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• 2013

As the weight of embedded memory within Systems-On-Chips(SoC) rapidly increases to 80-90% of the number of total transistors, the importance of testing embedded memory in SoC increases. This paper proposes IEEE std. 1500 wrapper based Programmable Memory Built-In Self-Test(PMBIST) architecture which can support various kinds of test algorithm. The proposed PMBIST guarantees high flexibility, programmability and fault coverage using not only March algorithms but also non-March algorithms such as Walking and Galloping. The PMBIST has an optimal hardware overhead by an optimum program instruction set and a smaller program memory. Furthermore, the proposed fault information processing scheme guarantees improvement of the memory yield by effectively supporting three types of the diagnostic methods for repair and diagnosis.

• The Transactions of the Korea Information Processing Society
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• v.5 no.11
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• pp.2989-2996
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• 1998

As the circuit density of VLSI grows and its performance improves, delay fault testing of VLSI becomes very important. Delay faults in a circuit can be categorized into two classes, gate delay faults and path delay faults. This paper proposed two methods in dynamic memory usage in the path delay fault simulation. The first method is similar to that used in concurrent fault simulation for stuck-at faults and the second method reduces dynamic memory usage by not inserting a fault descriptor into the fault list when its value is X. The second method, called Implicit-X method, showed superior performance in both dynamic memory usage and simulation time than the first method, called Concurrent-Simulation-Like method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.34-41
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• 2007

We popose a programmed on-line to FSM-based Programmable BIST(Buit-In Self-Test) with selected command, to select a test algorithm from a predetermined set of algorithms that are built in the Flash memory BIST. Thus, the proposed scheme greatly simplifies the testing process. Besides, the proposed FSM-based Programmable BIST is more efficient in terms of circuit size and test data to be applied, and it requires less time to configure the Flash memory BIST. We also will develop a programmable Flash memory BIST generator that automatically produces Verilog code of the proposed BIST architecture for a given set of test algorithms. If experiment the proposed method, the proposed method will achieves a good flexibility with smaller circuit size compared with previous methods.

• Smart Structures and Systems
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• v.3 no.1
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• pp.89-114
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• 2007

Two aspects of the design of a small-scale smart wing are addressed in this work, related to the ability of the wing to modify its cross section assuming the shape of two different airfoils and to the possibility of deflecting the profiles near the trailing edge in order to obtain hingeless control surfaces. The actuation is provided by one-way shape memory alloy wires eventually coupled to springs, Shape Memory Alloys (SMAs) being among the most promising materials for this kind of applications. The points to be actuated along the profiles and the displacements to be imposed are selecetd so that they satisfactorily approximate the change from an airfoil to the other and to result in an adequate deflection of the control surface; the actuators and their performances are designed so that an adequate wing stiffness is guaranteed, in order to prevent excessive deformations and undesired airfoil shape variations due to aerodynamic loads. The effect of the pressure distributions, calculated by way of the XFOIL software, and of the actuators loads, is estimated by FE analyses of the loaded wing. Two prototypes are then realised incorporating the variable airfoil and the hingeless aileron features respectively, and the verification of their shapes in both the actuated and non-actuated states, supported by image analysis techniques, confirms that interesting results are achievable with the proposed lay out and design considerations.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.4
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• pp.45-50
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• 2012

A family of multi-die DRAM packages was developed that incorporate the full functionality of an SODIMM into a single package. Using a common ball assignment analogous to the edge connector of an SODIMM, a broad range of memory types and assembly structures are supported in this new package. In particular DDR3U, LPDDR3 and DDR4RS are all supported. The center-bonded DRAM use face-down wirebond assembly, while the peripherybonded LPDDR3 use the face-up configuration. Flip chip assembly as well as TSV stacked memory is also supported in this new technology. For the center-bonded devices (DDR3, DDR4 and LPDDR3 ${\times}16$ die) and for the face up wirebonded ${\times}32$ LPDDR3 devices, a simple manufacturing flow is used: all die are placed on the strip in a single machine insertion and are sourced from a single wafer. Wirebonding is also a single insertion operation: all die on a strip are wirebonded at the same time. Because the locations of the power signals is unchanged for these different types of memories, a single consolidated set of test hardware can be used for testing and burn-in for all three memory types.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.376-379
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• 2001

In this paper, I design the control chip that controls inner test sequence of Logic Tester to test chip. Logic tester has the thirteen inner instructions to control test sequence in test. And these instructions are saved in memory with test pattern data. Control chip generates address and control signal such as read, write signal of memory. Before testing, necessary data such as start address, end address, etc. are written to inner register of control chip. When test started, control chip receives the instruction in start address and executes, and generates address and control signals to access tester' inner memory. So whole test sequence is controlled by making the address and control signal in tester's inner memory. Control chip designs instruction's execution blocks, respectively. So if inner instruction is added from now on, a revision is easy. The control chip will be made using FPGA of Xilinx Co. in future.

• Smart Structures and Systems
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• v.31 no.5
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• pp.531-543
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• 2023

Base isolation is one of the most widely implemented and well-known technique to reduce structural vibration and damages during an earthquake. However, while the base-isolated structure reduces storey drift significantly, it also increases the base drifts causing many practical problems. This study proposes the use of Shape Memory Alloys (SMA) wires for the reduction in base drift while controlling the overall structure vibrations. A multi-degree-of-freedom (MDOF) structure along with base isolators and Shape-Memory-Alloys (SMA) wires in diagonal is tested experimentally and analytically. The isolation bearing considered in this study consists of laminates of steel and silicon rubber. The performance of the proposed structure is evaluated and studied under different loadings including harmonic loading and seismic excitation. To assess the seismic performance of the proposed structure, shake table tests are conducted on base-isolated MDOF frame structure incorporating SMA wires, which is subjected to incremental harmonic and historic seismic loadings. Root mean square acceleration, displacement and drift are analyzed and discussed in detail for each story. To better understand the structure response, the percentage reduction of displacement is also determined for each story. The result shows that the reduction in the response of the proposed structure is much better than conventional base-isolated structure.

• The Journal of Pediatrics of Korean Medicine
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• v.23 no.1
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• pp.95-113
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• 2009

Objectives This study was investigated to find how the orally administrated Moschus, herbal combination with Moschus, and herbal combination improves the rats' memory and rats' liver. These medications are generally known asthe memory improvement. Methods This study used the Sprague Dawley rats. They were divided into two groups - SD rats and orally administrated Saline(Control group). 0.473 mg/kg Moschus(HM-A), 153.9 mg/kg herbal composition without Moschus(HM-B), and 165.95 mg/kg herbal composition with Moschus combined(HM-C) Control, saline were orally administered. Each group was trained in the eight-arm radial maze task at the conditions of before oral administrated, and also right after third, sixth, and eighth by oral administration. Lastly, these animals were killed and were tested for brain tissue and serum AST/ALT level to measure how the medications were effected to the liver function. Results The result of radial eight-arm maze task test, the HM-B and HM-C groups showed significant decrease in mistakes from the fourth day of testing. Whereas, the HM-A group showed increasing in the error rate. HM-A and HM-C group of rats had significantly increased amount of acetylcholinesterase in the CA1 region of hippocampus, compared to the control group. Whereas, HM-B and HM-C group had increased level of ChAT compared to the control group. On the other hand, each experimental group did not show any significant difference to the level of serum AST/ALT and the weight ratio of the liver to the body. Conclusions This study provided evidences that the orally administered memory improvement herbal medication, and Moschus were effective to improve memory.

• Toxicological Research
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• v.24 no.3
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• pp.183-188
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• 2008

The behavioral phenotypes of out-bred ICR mice were compared with those of in-bred C57BL/6 and BALB/c mice. In particular, this study examined the locomotor activity and two forms of hippocampus-dependent learning paradigms, passive avoidance and object recognition memory. The basal open-field activity of the ICR strain was greater than that of the C57BL/6 and BALB/c strains. In the passive avoidance task, all the mice showed a significant increase in the cross-over latency when tested 24 hours after training. The strength of memory retention in the ICR mice was relatively weak and measurable, as indicated by the shorter cross-over latency than the C57BL/6 and BALB/c mice. In the object recognition memory test, all strains had a significant preference for the novel object during testing. The index for the preference of a novel object was lower for the ICR and BALB/c mice. Nevertheless, the variance and the standard deviation in these strains were comparable. Overall, these results confirm the strain differences on locomotor activity and hippocampus-dependent learning and memory in mice.

• Journal of Physiology & Pathology in Korean Medicine
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• v.32 no.6
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• pp.375-383
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• 2018

This study was conducted to investigate the cognitive improvement and memory recovery effects of Korean and Chinese Crataegus pinnatifida ethanolic extracts on scopolamine-induced memory impairment in mice. In vivo studies were carried out with mice treated with Korean Crataegus pinnatifida extracts (KCF) and Chinese Crataegus pinnatifida extracts (CCF) in doses of 5 and 50 mg/kg (p.o.) and scopolamine was injected 30 min before the behavioral testing. Antioxidant activity was assessed by 2,2-diphenyl-1-picryl hydrazyl (DPPH) assay and 2,2-azino-bis (3-ethylbenzothiazoline-6-sulfonic acid) (ABTS) assay, and acetylcholinesterase inhibition by Ellman's modified method. The chlorogenic acid and hyperoside as marker compounds of KCF and CCF was quantified by ultra-performance liquid chromatography analysis (UPLC). Results showed that KCF was more contained high content of chlorogenic acid and hyperoside than CCF. In addition, KCF was more exerted free radical (DPPH and ABTS) scavenging activity and blocked AChE activity than CCF. In vivo studies also showed that KCF administration has a further improved the memory of scopolamine-treated mice than CCF in Y-maze test, passive avoidance test and Morris water maze test. These results revealed that KCF more prevents scopolamine-induced memory impairments through antioxidant and acethylcholinesterase inhibition effect compared CCF.