1 |
A. J. van de Goor, John Wiley & Sons Chichester, 'Testing Semiconductor Memories: Theory and Practice', in Proceeding of England, 1991
|
2 |
K. -L. Cheng, J. -C. Yeh, C. -W. Wang, C. -T. Huang, and C. -W. Wu, 'RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics', in Proceeding IEEE VLSI Test Symp.(VTS) on Monterey California, pp. 281-286, April 2002
|
3 |
J. -C. Yeh, Y. -T. Lai, Y. -Y. Shih, and C. -W. Wu, C. -H. Ho, Y. -T. Lin, 'Flash memory built-in self-diagnosis with test mode control', VLSI Test Symposium in Proceedings 23rd IEEE, pp. 15-20, May 2005
|
4 |
M. Mohammad and K. K. Saluja, 'Flash memory disturbances: modeling and test,' in Proceeding IEEE VLSI Test Symp.(VTS) on Monterey California, pp. 218-22, April 2001
|
5 |
Banerjee S, Chowdhury D. R, 'Built-in self-test for flash memory embedded in SoC', Electronic Design, Test and Applications in DELTA 2006, January 2006
|
6 |
J. -C. Yeh, C. -F. Wu, K. -L. Cheng, C. -W. Wu, 'Flash memory built-in self-test using march-like algorithms,' in Proceeding IEEE International Workshop on Electronic Design, Test, and Applications (DELTA), Christchurch, pp. 137-141, January 2002
|
7 |
P. Pavan, R. Bex, D. Olivo, and E. Zanon, 'Flash memory cells- an overview,' in Proceeding of IEEE, vol.85, pp. 1248-1271, August 1997
|
8 |
S. -K. Chiu, J. -C. Yeh, C. -T. Huang, and C. -W. Wu, 'Diagonal test and diagnostic schemes for flash memories,' in Proceeding International Test Conference(ITC) on Baltmore, pp. 37-46, October 2002
|
9 |
M. G. Mohammad, K. K. Saluja, and A. Yap, 'Testing flash memories,' VLSI Design 13th, pp. 406-41, January 2000
|