• Title/Summary/Keyword: memory device

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Study on the improvement of Memory-device unification for Point-switch machine (선로전환기용 기억쇠 단일화 개선방안 연구)

  • Lee, Nam-Il;Ko, Yang-Ok;Jung, Ho-Hung
    • Proceedings of the KSR Conference
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    • 2011.05a
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    • pp.1440-1444
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    • 2011
  • Memory-device is one of the auxiliary components of point-switch machine; connecting front-rod and tongue-rail. The right side and left side of memory-device are different from each other. When there would be a derailing accident of rolling stock or motor-car, the memory-device properly bends and protects the internal of point-switch machine. Memory-device is one of the important site maintenance spare parts. Memory-device for each of right and left side should be secured so that they can be installed on correct side during an exchange work. This study suggests the development of memory-device with different left and right side and the performance test of it. The study intends to contribute in the convenience improvement of maintenance by improving the unification of memory-device.

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Workpiece-Chucking Device Using Two-Way Shape Memory Alloys: Feasibility Test (양방향성 형상기억합금을 이용한 공작물 척킹장치: 유용성 검증)

  • Shin, Woo-Cheol;Ro, Seung-Kook;Park, Jong-Kweon
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.18 no.5
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    • pp.462-468
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    • 2009
  • In this study, a workpiece-chucking device that generates a chucking force from a shape memory alloy is introduced. This paper first presents train procedure to transform a commercial one-way shape memory alloy into a two-way shape memory alloy, which makes unclamping mechanism of the chucking device simpler than that using the one-way shape memory alloy Second, it describes a conceptual design of the workpiece-chucking device using the two-way type shape memory alloy. Third, it presents a prototype and its chucking characteristics, such as time-response of clamping/unclamping operations and a relationship between temperatures and chucking forces. Finally, it describes a mill-machining test conducted with the prototype. The results confirm that the proposed workpiece-chucking device is feasible for micro machine-tools.

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Nanoscale NAND SONOS memory devices including a Seperated double-gate FinFET structure

  • Kim, Hyun-Joo;Kim, Kyeong-Rok;Kwack, Kae-Dal
    • Journal of Applied Reliability
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    • v.10 no.1
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    • pp.65-71
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    • 2010
  • NAND-type SONOS with a separated double-gate FinFET structure (SDF-Fin SONOS) flash memory devices are proposed to reduce the unit cell size of the memory device and increase the memory density in comparison with conventional non volatile memory devices. The proposed memory device consists of a pair of control gates separated along the direction of the Fin width. There are two unique alternative technologies in this study. One is a channel doping method and the other is an oxide thickness variation method, which are used to operate the SDF-Fin SONOS memory device as two-bit. The fabrication processes and the device characteristics are simulated by using technology comuter-adided(TCAD). The simulation results indicate that the charge trap probability depends on the different channel doping concentration and the tunneling oxide thickness. The proposed SDG-Fin SONOS memory devices hold promise for potential application.

Low Voltage Program/Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer

  • Choe, Jeong-Dong;Yeo, Kyoung-Hwan;Ahn, Young-Joon;Lee, Jong-Jin;Lee, Se-Hoon;Choi, Byung-Yong;Sung, Suk-Kang;Cho, Eun-Suk;Lee, Choong-Ho;Kim, Dong-Won;Chung, Il-Sub;Park, Dong-Gun;Ryu, Byung-Il
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.2
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    • pp.68-73
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    • 2006
  • We propose a damascene gate FinFET with Si nanocrystals implemented on bulk silicon wafer for low voltage flash memory device. The use of optimized SRON (Silicon-Rich Oxynitride) process allows a high degree of control of the Si excess in the oxide. The FinFET with Si nanocrystals shows high program/erase (P/E) speed, large $V_{TH}$ shifts over 2.5V at 12V/$10{\mu}s$ for program and -12V/1ms for erase, good retention time, and acceptable endurance characteristics. Si nanocrystal memory with damascene gate FinFET is a solution of gate stack and voltage scaling for future generations of flash memory device. Index Terms-FinFET, Si-nanocrystal, SRON(Si-Rich Oxynitride), flash memory device.

Resistance Switching Mechanism of Metal-Oxide Nano-Particles Memory on Graphene Layer

  • Lee, Dong-Uk;Kim, Dong-Wook;Kim, Eun-Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.318-318
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    • 2012
  • A graphene layer is most important materials in resent year to enhance the electrical properties of semiconductor device due to high mobility, flexibility, strong mechanical resistance and transparency[1,2]. The resistance switching memory with the graphene layer have been reported for next generation nonvolatile memory device[3,4]. Also, the graphene layer is able to improve the electrical properties of memory device because of the high mobility and current density. In this study, the resistance switching memory device with metal-oxide nano-particles embedded in polyimide layer on the graphene mono-layer were fabricated. At first, the graphene layer was deposited $SiO_2$/Si substrate by using chemical vapor deposition. Then, a biphenyl-tetracarboxylic dianhydride-phenylene diamine poly-amic-acid was spin coated on the deposited metal layer on the graphene mono-layer. Then the samples were cured at $400^{\circ}C$ for 1 hour in $N_2$ atmosphere after drying at $135^{\circ}C$ for 30 min through rapid thermal annealing. The deposition of aluminum layer with thickness of 200 nm was done by a thermal evaporator. The electrical properties of device were measured at room temperature using an HP4156a precision semiconductor parameter analyzer and an Agilent 81101A pulse generator. We will discuss the switching mechanism of memory device with metal-oxide nano-particles on the graphene mono-layer.

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Recent Advance of Flexible Organic Memory Device

  • Kim, Jaeyong;Hung, Tran Quang;Kim, Choongik
    • Journal of Semiconductor Engineering
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    • v.1 no.1
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    • pp.38-45
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    • 2020
  • With the recent emergence of foldable electronic devices, interest in flexible organic memory is significantly growing. There are three types of flexible organic memory that have been researched so far: floating-gate (FG) memory, ferroelectric field-effect-transistor (FeFET) memory, and resistive memory. Herein, performance parameters and operation mechanisms of each type of memory device are introduced, along with a brief summarization of recent research progress in flexible organic memory.

Durability of the Flexible Shape Memory Device (형상 기억 유연 소자의 내구성 평가에 관한 연구)

  • Yang, Hee-Kyung;Kim, Hae-Jin;Kim, Dae-Eun
    • Transactions of the Society of Information Storage Systems
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    • v.11 no.2
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    • pp.36-40
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    • 2015
  • The demand for flexible devices including solar cells, memories and batteries has increased rapidly over the past decades. In most flexible devices, polymer-based materials are used to enable the mechanical deformations such as bending or folding. Shape Memory Polymers (SMPs) is a high molecular compound polymer with flexibility and shape recovery characteristics. In this work, flexible shape memory device was fabricated by simply coating the conducting material, carbon nano-tube (CNT), on a shape memory polymer. Furthermore, durability of the device under various type of mechanical deformations was assessed. It is believed that the result of this work will aid in realization of a stretchable and wearable electronic device for practical applications.

A study on the fabrication and characteristics of the scaled MONOS nonvolatile memory devices for low voltage EEPROMs (저전압 EEPROM을 위한 Scaled MONOS 비휘발성 기억소자의 제작 및 특성에 관한 연구)

  • 이상배;이상은;서광열
    • Electrical & Electronic Materials
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    • v.8 no.6
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    • pp.727-736
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    • 1995
  • This paper examines the characteristics and physical properties of the scaled MONOS nonvolatile memory device for low programming voltage EEPROM. The capacitor-type MONOS memory devices with the nitride thicknesses ranging from 41.angs. to 600.angs. have been fabricated. As a result, the 5V-programmable MONOS device has been obtained with a 20ms programming time by scaling the nitride thickness to 57.angs. with a tunneling oxide thickness of 19.angs. and a blocking oxide thickness of 20.angs.. Measurement results of the quasi-static C-V curves indicate, after 10$\^$6/ write/erase cycles, that the devices are degraded due to the increase of the silicon-tunneling oxide interface traps. The 10-year retention is impossible for the device with a nitride less than 129.angs.. However, the MONOS memory device with 10-year retentivity has been obtained by increasing the blocking oxide thickness to 47.angs.. Also, the memory traps such as the nitride bulk trap and the blocking oxide-nitride interface trap have been investigated by measuring the maximum flatband voltage shift and analyzing through the best fitting method.

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Design of the Memory Error Test Module at a Device Driver of the Linux (리눅스 디바이스 드라이버 내의 메모리 오류 테스트 모듈 설계)

  • Jang, Seung-Ju
    • The KIPS Transactions:PartA
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    • v.14A no.3 s.107
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    • pp.185-190
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    • 2007
  • The necessity of error test module is increasing as development of embedded Linux device driver. This paper proposes the basic concept of freed memory error test module in the Linux device driver and designs error test module. The USB device driver is designed for freed memory error test module. I insert the test code to verify the USB device driver. I test the suggested error test module for the USB storage device driver. I experiment error test in this module.