• 제목/요약/키워드: memory device

검색결과 1,086건 처리시간 0.027초

선로전환기용 기억쇠 단일화 개선방안 연구 (Study on the improvement of Memory-device unification for Point-switch machine)

  • 이남일;고양옥;정호형
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2011년도 춘계학술대회 논문집
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    • pp.1440-1444
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    • 2011
  • Memory-device is one of the auxiliary components of point-switch machine; connecting front-rod and tongue-rail. The right side and left side of memory-device are different from each other. When there would be a derailing accident of rolling stock or motor-car, the memory-device properly bends and protects the internal of point-switch machine. Memory-device is one of the important site maintenance spare parts. Memory-device for each of right and left side should be secured so that they can be installed on correct side during an exchange work. This study suggests the development of memory-device with different left and right side and the performance test of it. The study intends to contribute in the convenience improvement of maintenance by improving the unification of memory-device.

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양방향성 형상기억합금을 이용한 공작물 척킹장치: 유용성 검증 (Workpiece-Chucking Device Using Two-Way Shape Memory Alloys: Feasibility Test)

  • 신우철;노승국;박종권
    • 한국생산제조학회지
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    • 제18권5호
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    • pp.462-468
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    • 2009
  • In this study, a workpiece-chucking device that generates a chucking force from a shape memory alloy is introduced. This paper first presents train procedure to transform a commercial one-way shape memory alloy into a two-way shape memory alloy, which makes unclamping mechanism of the chucking device simpler than that using the one-way shape memory alloy Second, it describes a conceptual design of the workpiece-chucking device using the two-way type shape memory alloy. Third, it presents a prototype and its chucking characteristics, such as time-response of clamping/unclamping operations and a relationship between temperatures and chucking forces. Finally, it describes a mill-machining test conducted with the prototype. The results confirm that the proposed workpiece-chucking device is feasible for micro machine-tools.

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Nanoscale NAND SONOS memory devices including a Seperated double-gate FinFET structure

  • Kim, Hyun-Joo;Kim, Kyeong-Rok;Kwack, Kae-Dal
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제10권1호
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    • pp.65-71
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    • 2010
  • NAND-type SONOS with a separated double-gate FinFET structure (SDF-Fin SONOS) flash memory devices are proposed to reduce the unit cell size of the memory device and increase the memory density in comparison with conventional non volatile memory devices. The proposed memory device consists of a pair of control gates separated along the direction of the Fin width. There are two unique alternative technologies in this study. One is a channel doping method and the other is an oxide thickness variation method, which are used to operate the SDF-Fin SONOS memory device as two-bit. The fabrication processes and the device characteristics are simulated by using technology comuter-adided(TCAD). The simulation results indicate that the charge trap probability depends on the different channel doping concentration and the tunneling oxide thickness. The proposed SDG-Fin SONOS memory devices hold promise for potential application.

Low Voltage Program/Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer

  • Choe, Jeong-Dong;Yeo, Kyoung-Hwan;Ahn, Young-Joon;Lee, Jong-Jin;Lee, Se-Hoon;Choi, Byung-Yong;Sung, Suk-Kang;Cho, Eun-Suk;Lee, Choong-Ho;Kim, Dong-Won;Chung, Il-Sub;Park, Dong-Gun;Ryu, Byung-Il
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권2호
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    • pp.68-73
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    • 2006
  • We propose a damascene gate FinFET with Si nanocrystals implemented on bulk silicon wafer for low voltage flash memory device. The use of optimized SRON (Silicon-Rich Oxynitride) process allows a high degree of control of the Si excess in the oxide. The FinFET with Si nanocrystals shows high program/erase (P/E) speed, large $V_{TH}$ shifts over 2.5V at 12V/$10{\mu}s$ for program and -12V/1ms for erase, good retention time, and acceptable endurance characteristics. Si nanocrystal memory with damascene gate FinFET is a solution of gate stack and voltage scaling for future generations of flash memory device. Index Terms-FinFET, Si-nanocrystal, SRON(Si-Rich Oxynitride), flash memory device.

Resistance Switching Mechanism of Metal-Oxide Nano-Particles Memory on Graphene Layer

  • Lee, Dong-Uk;Kim, Dong-Wook;Kim, Eun-Kyu
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.318-318
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    • 2012
  • A graphene layer is most important materials in resent year to enhance the electrical properties of semiconductor device due to high mobility, flexibility, strong mechanical resistance and transparency[1,2]. The resistance switching memory with the graphene layer have been reported for next generation nonvolatile memory device[3,4]. Also, the graphene layer is able to improve the electrical properties of memory device because of the high mobility and current density. In this study, the resistance switching memory device with metal-oxide nano-particles embedded in polyimide layer on the graphene mono-layer were fabricated. At first, the graphene layer was deposited $SiO_2$/Si substrate by using chemical vapor deposition. Then, a biphenyl-tetracarboxylic dianhydride-phenylene diamine poly-amic-acid was spin coated on the deposited metal layer on the graphene mono-layer. Then the samples were cured at $400^{\circ}C$ for 1 hour in $N_2$ atmosphere after drying at $135^{\circ}C$ for 30 min through rapid thermal annealing. The deposition of aluminum layer with thickness of 200 nm was done by a thermal evaporator. The electrical properties of device were measured at room temperature using an HP4156a precision semiconductor parameter analyzer and an Agilent 81101A pulse generator. We will discuss the switching mechanism of memory device with metal-oxide nano-particles on the graphene mono-layer.

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Recent Advance of Flexible Organic Memory Device

  • Kim, Jaeyong;Hung, Tran Quang;Kim, Choongik
    • Journal of Semiconductor Engineering
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    • 제1권1호
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    • pp.38-45
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    • 2020
  • With the recent emergence of foldable electronic devices, interest in flexible organic memory is significantly growing. There are three types of flexible organic memory that have been researched so far: floating-gate (FG) memory, ferroelectric field-effect-transistor (FeFET) memory, and resistive memory. Herein, performance parameters and operation mechanisms of each type of memory device are introduced, along with a brief summarization of recent research progress in flexible organic memory.

형상 기억 유연 소자의 내구성 평가에 관한 연구 (Durability of the Flexible Shape Memory Device)

  • 양희경;김해진;김대은
    • 정보저장시스템학회논문집
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    • 제11권2호
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    • pp.36-40
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    • 2015
  • The demand for flexible devices including solar cells, memories and batteries has increased rapidly over the past decades. In most flexible devices, polymer-based materials are used to enable the mechanical deformations such as bending or folding. Shape Memory Polymers (SMPs) is a high molecular compound polymer with flexibility and shape recovery characteristics. In this work, flexible shape memory device was fabricated by simply coating the conducting material, carbon nano-tube (CNT), on a shape memory polymer. Furthermore, durability of the device under various type of mechanical deformations was assessed. It is believed that the result of this work will aid in realization of a stretchable and wearable electronic device for practical applications.

저전압 EEPROM을 위한 Scaled MONOS 비휘발성 기억소자의 제작 및 특성에 관한 연구 (A study on the fabrication and characteristics of the scaled MONOS nonvolatile memory devices for low voltage EEPROMs)

  • 이상배;이상은;서광열
    • E2M - 전기 전자와 첨단 소재
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    • 제8권6호
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    • pp.727-736
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    • 1995
  • This paper examines the characteristics and physical properties of the scaled MONOS nonvolatile memory device for low programming voltage EEPROM. The capacitor-type MONOS memory devices with the nitride thicknesses ranging from 41.angs. to 600.angs. have been fabricated. As a result, the 5V-programmable MONOS device has been obtained with a 20ms programming time by scaling the nitride thickness to 57.angs. with a tunneling oxide thickness of 19.angs. and a blocking oxide thickness of 20.angs.. Measurement results of the quasi-static C-V curves indicate, after 10$\^$6/ write/erase cycles, that the devices are degraded due to the increase of the silicon-tunneling oxide interface traps. The 10-year retention is impossible for the device with a nitride less than 129.angs.. However, the MONOS memory device with 10-year retentivity has been obtained by increasing the blocking oxide thickness to 47.angs.. Also, the memory traps such as the nitride bulk trap and the blocking oxide-nitride interface trap have been investigated by measuring the maximum flatband voltage shift and analyzing through the best fitting method.

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리눅스 디바이스 드라이버 내의 메모리 오류 테스트 모듈 설계 (Design of the Memory Error Test Module at a Device Driver of the Linux)

  • 장승주
    • 정보처리학회논문지A
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    • 제14A권3호
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    • pp.185-190
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    • 2007
  • 임베디드 리눅스 디바이스 드라이버의 개발이 증가하면서 이에 대한 오류 테스트 기능을 가진 모듈의 필요성이 증가되고 있다. 본 논문은 리눅스 디바이스 드라이버를 위한 freed 메모리 오류 테스트 모듈의 기본 개념을 제시하며, 기본 개념을 바탕으로 오류 테스트 모듈을 설계한다. freed 메모리 오류 테스트 모듈 설계를 위해 리눅스 USB 디바이스 드라이버에 적용하고, 오류가 발생할 가능성이 존재하는 부분에 대한 검증 코드를 추가하여 테스트 모듈을 작성한다. 오류 테스트 모듈 설계를 위해서 usb storage 디바이스 드라이버를 대상으로 하였다. 또한 작성된 오류 테스트 모듈의 실험을 진행하였다. 실험을 통해 리눅스 디바이스 드라이버의 오류 테스트 모듈의 동작을 확인할 수 있다.