• Title/Summary/Keyword: memory device

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Non-explosive Separation Device Harnessing Spring Clamp and Shape Memory Alloy Wire (스프링 클램프와 형상기억합금 와이어를 이용한 비폭발식 분리장치)

  • Choi, Junwoo;Lee, Dongkyu;Hwang, Kukha;Lee, Minhyung;Kim, Byungkyu
    • Journal of Aerospace System Engineering
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    • v.9 no.2
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    • pp.7-12
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    • 2015
  • In this paper, we report a non-explosive separation device for a small satellite which utilize a shape memory alloy actuator and spring clamp. In order to increase the preload, the proposed device employs spring clamp that can generate high toque when the shape memory alloy actuator makes the cylinder key unlatch a holding ball effectively. Owing to simple design of separation device configuration, we could obtain good repeatability(up to 30 times activation). Conclusively, we could develop a non-explosive separation device which can reliably activate within 1.2 sec under high preload(up to 300kgf).

Modeling and Simulation of a Shape Memory Release Device (형상기억합금을 이용한 분리장치의 모델 및 모사에 관한 연구)

  • Lee, Yeung-Jo
    • Journal of the Korean Society of Propulsion Engineers
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    • v.10 no.3
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    • pp.99-108
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    • 2006
  • Aerospace applications use pyrotechnic devices with many different functions. Functional shock, safety, overall system cost issue, and availability of new technologies, however, question the continued use of these mechanisms on aerospace applications. Release device is an important example of a task usually executed by pyrotechnic mechanisms. Many aerospace applications like satellite solar panels deployment or weather balloon separation need a release device. Several incidents, where pyrotechnic mechanisms could be responsible for spacecraft failure, have been encouraging new designs for these devices. The Frangibolt is a non explosive device which comprises a commercially available bolt and a small collar made of shape memory alloy (SMA) that replace conventional explosive bolt systems. This paper presents the modeling and simulation of Frangiblot by the change of bolt size and notch geometry. This analysis may contribute to improve the Frangibolt design.

A Study on the Tunable Memory Characteristics of Nanoparticle-Based Nonvolatile Memory devices according to the Metal Nanoparticle Species (금속나노입자의 종류에 따른 나노입자 기반 비휘발성 메모리 소자의 특성 변화에 관한 연구)

  • Kim, Yong-Mu;Park, Young-Su;Lee, Jang-Sik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.19-19
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    • 2008
  • We investigated the programmable memory characteristics of nanoparticle-based memory devices based on the elementary metal nanoparticles (Co and Au) and their binary mixture synthesized by a micellar route to ordered arrays of metal nanoparticles as charge trapping layers. According to the metal nanoparticle species quite different programming/erasing efficiencies were observed, resulting in the tunable memory characteristics at the same programming/erasing bias conditions. This finding will be a good implication for further device scaling and novel device applications since most processes are based on the conventional semiconductor processes.

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Phase Change Properties of Amorphous Ge1Se1Te2 and Ge2Sb2Te5 Chalcogenide Thin Films (비정질 Ge1Se1Te2 과 Ge2Sb2Te5 칼코게나이드 박막의 상변화특성)

  • Chung Hong-Bay;Cho Won-Ju;Ku Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.10
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    • pp.918-922
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    • 2006
  • Chalcogenide Phase change memory has the high performance necessary for next-generation memory, because it is a nonvolatile memory with high programming speed, low programming voltage, high sensing margin, low power consumption and long cycle duration. To minimize the power consumption and the program voltage, the new composition material which shows the better phase-change properties than conventional $Ge_2Sb_2Te_5$ device has to be needed by accurate material engineering. In the present work, we investigate the basic thermal and the electrical properties due to phase-change compared with chalcogenide-based new composition $Ge_1Se_1Te_2$ material thin film and convetional $Ge_2Sb_2Te_5$ PRAM thin film. The fabricated new composition $Ge_1Se_1Te_2$ thin film exhibited a successful switching between an amorphous and a crystalline phase by applying a 950 ns -6.2 V set pulse and a 90 ns -8.2 V reset pulse. It is expected that the new composition $Ge_1Se_1Te_2$ material thin film device will be possible to applicable to overcome the Set/Reset problem for the nonvolatile memory device element of PRAM instead of conventional $Ge_2Sb_2Te_5$ device.

LDF-CLOCK: The Least-Dirty-First CLOCK Replacement Policy for PCM-based Swap Devices

  • Yoo, Seunghoon;Lee, Eunji;Bahn, Hyokyung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.68-76
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    • 2015
  • Phase-change memory (PCM) is a promising technology that is anticipated to be used in the memory hierarchy of future computer systems. However, its access time is relatively slower than DRAM and it has limited endurance cycle. Due to this reason, PCM is being considered as a high-speed storage medium (like swap device) or long-latency memory. In this paper, we adopt PCM as a virtual memory swap device and present a new page replacement policy that considers the characteristics of PCM. Specifically, we aim to reduce the write traffic to PCM by considering the dirtiness of pages when making a replacement decision. The proposed replacement policy tracks the dirtiness of a page at the granularity of a sub-page and replaces the least dirty page among pages not recently used. Experimental results with various workloads show that the proposed policy reduces the amount of data written to PCM by 22.9% on average and up to 73.7% compared to CLOCK. It also extends the lifespan of PCM by 49.0% and reduces the energy consumption of PCM by 3.0% on average.

Analysis of the GPGPU Performance for Various Combinations of Workloads Executed Concurrently (동시에 실행되는 워크로드 조합에 따른 GPGPU 성능 분석)

  • Kim, Dongwhan;Eom, Hyeonsang
    • KIISE Transactions on Computing Practices
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    • v.23 no.3
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    • pp.165-170
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    • 2017
  • Many studies have utilized GPGPU (General-Purpose Graphic Processing Unit) and its high computing power to compute complex tasks. The characteristics of GPGPU programs necessitate the operations of memory copy between the host and device. A high latency period can affect the performance of the program. Thus, it is required to significantly improve the performance of GPGPU programs by optimizations. By executing multiple GPGPU programs simultaneously, the latency hiding effect of memory copy is achieved by overlapping the memory copy and computing operations in GPGPU. This paper presents the results of analyzing the latency hiding effect for memory copy operations. Furthermore, we propose a performance anticipation model and an algorithm for the limitations of using pinned memory, and show that the use of the proposed algorithm results in a 41% performance increase.

SSR (Simple Sector Remapper) the fault tolerant FTL algorithm for NAND flash memory

  • Lee, Gui-Young;Kim, Bumsoo;Kim, Shin-han;Byungsoo Jung
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.932-935
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    • 2002
  • In this paper, we introduce new FTL(Flash Translation Layer) driver algorithm that tolerate the power off errors. FTL driver is the software that provide the block device interface to the upper layer software such as file systems or application programs that using the flash memory as a block device interfaced storage. Usually, the flash memory is used as the storage devices of the mobile system due to its low power consumption and small form factor. In mobile system, the state of the power supplement is not stable, because it using the small sized battery that has limited capacity. So, a sudden power off failure can be occurred when we read or write the data on the flash memory. During the write operation, power off failure may introduce the incomplete write operation. Incomplete write operation denotes the inconsistency of the data in flash memory. To provide the stable storage facility with flash memory in mobile system, FTL should provide the fault tolerance against the power off failure. SSR (Simple Sector Remapper) is a fault tolerant FTL driver that provides block device interface and also provides tolerance against power off errors.

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Smart device based short-term memory training system for interpretation (스마트 단말에서의 통역용 단기기억력 향상 훈련 시스템)

  • Pyo, Ji Hye;An, Donghyeok
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.9 no.3
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    • pp.747-756
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    • 2019
  • Students studying interpretation perform additional study and training in addition to regular class. In simultaneous interpreting and consecutive interpreting, interpreter should memorize speaker's announcement because of different language structure. To improve short-term memory, students perform memory training that requires a pair of students. Therefore, they can not perform self-learning, and therefore, efficiency of studying decreases. To resolve this problem, computer based short-term memory training system has been proposed. Student can perform self-learning by changing words in text to special character in the training system. However, efficiency of studying decreases because computer has low portability. Since the number of words is larger than the number of words to be switched into special character, learning difficulty decreases. To resolve this problem, smart device based short-term memory training system has been proposed. Student can perform smart device based training system without space constraints. Since the proposed training system increases the number of words to be changed into special character, learning difficulty increases. We implemented and evaluated the functionalities of the proposed training system.

Organic-Inorganic Nanohybrid Structure for Flexible Nonvolatile Memory Thin-Film Transistor

  • Yun, Gwan-Hyeok;Kalode, Pranav;Seong, Myeong-Mo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.118-118
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    • 2011
  • The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

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Non volatile memory device using mobile proton in gate insulator by hydrogen neutral beam treatment

  • Yun, Jang-Won;Jang, Jin-Nyeong;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.192.1-192.1
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    • 2015
  • We demonstrated the nonvolatile memory functionality of nano-crystalline silicon (nc-Si) and InGaZnOxide (IGZO) thin film transistors (TFTs) using mobile protons that are generated by very short time hydrogen neutral beam (H-NB) treatment in gate insulator (SiO2). The whole memory fabrication process kept under $50^{\circ}C$ (except SiO2 deposition process; $300^{\circ}C$). These devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We also executed hydrogen treatment in order to figure out the difference of mobile proton generation between PECVD and H-NB CVD that we modified. Our study will further provide a vision of creating memory functionality and incorporating proton-based storage elements onto a probability of next generation flexible memorable electronics such as low power consumption flexible display panel.

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