• 한국전기전자재료학회논문지
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• 제17권2호
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• pp.144-149
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• 2004

Register Controlled DLL with fast locking and low-power consumption, is described in this paper. Delay monitor scheme is proposed to achieve the fast locking and inverter is inserted in front of delay line to reduce the power consumption, also. Proposed DLL was fabricated in a 0.6${\mu}{\textrm}{m}$ 1-poly 3-metal CMOS technology. The proposed delay monitor scheme enables the DLL to lock to the external clock within 4 cycles. The power consumption is 36㎽ with 3V supply voltage at 34MHz clock frequency.

• 한국시뮬레이션학회논문지
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• 제10권3호
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• pp.71-82
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• 2001

Considering material handling delay which occurs between storage and processing stations, we propose an algorithm to estimate the required storage capacity, i.e., number of aisles and number of openings in vertical and horizontal directions in each aisle, of an automated storage/retrieval(AS/R) system. Due to the random nature of storage and retrieval requests, proportion of single and dual commands is not known in advance. Two design criteria, maximum permissible overflow probability and maximum allowable storage/retrieval(S/R) machine utilization, are used to compute the storage capacity. Most of studies assume that storage capacity of AS/R systems is given, although it is a very important decision variable in the design phase. Therefore, the proposed model can be effectively used in the design phase of new AS/R systems.

• 한국전기전자재료학회논문지
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• 제18권3호
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• pp.206-211
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• 2005

The device makers want to make higher density chips on the wafer through scale-down. The change of WSix/poly-Si gate film thickness is one of the key issues under 100 nm device structure. As a new device etching process is applied, end point detection(EPD) time delay was occurred in DPS+ poly chamber of Applied Materials. This is a barrier of device shrink because EPD time delay made physical damage on the surface of gate oxide. To investigate the EPD time delay, the experimental test combined with OES(Optical Emission Spectroscopy) and SEM(Scanning Electron Microscopy) was performed using patterned wafers. As a result, a EPD delay time is reduced by a new chamber seasoning and a new wavelength line through plasma scan. Applying a new wavelength of 252 nm makes it successful to call corrected EPD in WSix/poly-Si stack-down gate etching in the DPS+ poly chamber for the current and next generation devices.

• 대한전자공학회논문지
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• 제13권6호
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• pp.1-6
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• 1976

탄성파 지연선의 진동자에서 전단과 지연매질사이의 접착제의 두께를 고려하여 변환손실을 계산하는 방법을 제안하며, 수치계산결과 접착제의 두께가 진동자 두께의 1/100정도 이하로 하여야 하며 전극의 두께가 진동자 두께의 1/10정도 될 때 중심주파수의 이동이 생진다. 접착제의 두께를 진동자와 거의 같거나 그 이상으로 하면 주파수 대역폭에서 현상이 점점 커지게 된다. In this paper, the methode of calculating conversion loss is proposed by considering the thickness of bonding medium between electrode and delay material in the vibrator of Elastic delay lines. As the result of computations using digital computer, it is shown that the thickness of bonding medium must be less than about 1/100 of the thickness of vibrator and when the thickness of electrode is about 1110 of vibrator, the center fnequency is shifted. When the thickness of bonding medium is equal to or more than the thickness of vibrator, the 리uctuations in frequency Bandwidth become larger and larger.

• 대한의용생체공학회:학술대회논문집
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• 대한의용생체공학회 1990년도 춘계학술대회
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• pp.67-71
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• 1990

This paper is dedicated to a research on fluorescent temperature-sensor system, which analyses the characteristic of fluorescent material and observes the relation between temperature and time delay of reflected beam from red light through experiment. From the experiment, We know that the reflected be am from flourescent material has some time delay. The intensity of reflected beam is inversly proportional to the temperature around the material.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1995년도 추계학술대회 논문집
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• pp.187-189
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• 1995

A Surface Acoustic Wave Gas sensor for NO, CO, H$_2$gas detection was designed fabricated, and tested. A delay line device was designed to composite a single mode SAW oscillator which enables to measure a SAW velocity. To reduce the effect of temperature and humidity, dual delay line oscillator circuit was used. And final output was measured by digital frequency counter. NO, CO, H$_2$gas were detected by WO$_3$thin film deposited on the path of the Delay Line.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.21-25
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• 1999

In order to remove minority carries of the base region at changing signal in conventional bipolar logic circuit, we made transistor which is composed of NPN transistor shortened buried layer under the Base region, PNP transistor which is merged in base, epi layer and substrate. Also the Ring-Oscillator for measuring transmission time-delay per gate was designed as well. In the result, we get amplitude of logic voltage of 200mV, the minimum of transmission delay-time of 211nS, and the minimum of transmission delay-time per gate of 7.26ns in AC characteristic output of Ring-Oscillator connected Gate.

• 한국안전학회지
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• 제19권2호
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• pp.54-60
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• 2004

Flammable substances are frequently used chemical industry processes. An accurate knowledge of the ALTs(Autoignition Temperatures) is important in developing appropriate prevention and control measures in industrial fire protection. The AITs describe the minimum temperature to which a substance must be heated, without the application of a flame or spark, which will cause that substance to ignite. The AITs are dependent upon many factors, namely initial temperature, pressure, volume, fuel/air stoichiometry, catalyst material, concentration of vapor, ignition delay. This study measured relationship between the AITs and the ignition delay times by using ASTM E659-78 apparatus for methanol and ethanol. The A.A.P.E.(Average Absolute Percent Error) and the A.A.D.(Average Absolute Deviation) of the experimental and the calculated delay times by the AITs for methanol were 14.59 and 1.76 respectively. Also the A.A.P.E. and the A.A.D. of the experimental and the calculated delay times by the ATIs for ethanol were 8.33 and 0.88.

• 대한전자공학회논문지
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• 제3권1호
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• pp.12-17
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• 1966

전자 지연선에 대한 보다 깊은 이론적 해석이 본 논문 속에 제시되었고 n=0 mode 동작시 지연선의 특성을 개량하기 위하여 단락 coil을 사용하므로써 위상이 다른 전류가 상호 자속을 상살시키는 현상을 제거하고 결과적으로 단위 길이당 시간 지연을 증가시킬 수 있음을 이론적으로 입증하고 실험에 의하여 확인하였다. 직경이 3"/8이고 길이가 6"인 전자 지연선을 제작한 후 실험한 결과 10 micro sec/m의 시간 지연을 측정할 수 있었다. 이는 Onoda나 Katz가 얻은 결과보다 월등하게 우수하다고 생각한다. 또한 실제 설계자를 돕기 위하여 설계 공식을 집약하여 알기 쉽게 설명하였다.

• 한국안전학회지
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• 제39권2호
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• pp.38-43
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• 2024

Recently, with the expanding market for electronic devices and electric vehicles, secondary battery usage has been on the rise. Lithium-ion batteries are particularly popular due to their fast charging times and lightweight nature compared to other types of batteries. A secondary battery consists of four components: anode, cathode, electrolyte, and separator. Generally, the positive and negative electrode materials of secondary batteries are composed of an active material, a binder, and a conductive material. Acetylene Black (AB) is utilized to enhance conductivity between active material particles or metal dust collectors, preventing the binder from acting as an insulator. However, when recycling waste batteries that have been subject to high usage, there is a risk of fire and explosion accidents, as accurately identifying the characteristics of Acetylene Black dust proves to be challenging. In this study, the lower explosion limit for Acetylene Black dust with an average particle size of 0.042 ㎛ was determined to be 153.64 mg/L using a Hartmann-type dust explosion device. Notably, the dust did not explode at values below 168 mg, rendering the lower explosion limit calculation unfeasible. Analysis of explosion delay times with varying electrode gaps revealed the shortest delay time at 3 mm, with a noticeable increase in delay times for gaps of 4 mm or greater. The findings offer fundamental data for fire and explosion prevention measures in Acetylene Black waste recycling processes via a predictive model for lower explosion limits and ignition delay time.