• Journal of the Korean Society for Precision Engineering
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• v.22 no.1
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• pp.199-206
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• 2005

Mask manufacturing is a high COC and COO process in developing of semiconductor devices because of mask production tool with high resolution. Direct writing has been thought to be the one of the patterning method to cope with development or small-lot production of the device. This study consists two categories. One is the additional process of the direct and maskless patterning generation using SLA for easy and convenient application and the other is a removal process using wet-etching process. In this study, cured status of epoxy pattern is most important parameter because of the beer-lambert law according to the diffusion of UV light. In order to improve the contact force between patterns and substrate, prime process was performed and to remove the semi-cured resin which makes a bad effects to the pattern, spin cleaning process using TPM was also performed. At a removal process, contact force between photo-curable resin as an etching mask and Si wafer is important parameter.

• Transactions of Materials Processing
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• v.13 no.4
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• pp.326-333
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• 2004

The nanoprobe based on lithography, mainly represented by SPM based technologies, has been recognized as a potential application to fabricate the surface nanosctructures because of its operational versatility and simplicity. However, nanoprobe based on lithography itself is not suitable for mass production because it is time a consuming method and not economical for commercial applications. One solution is to fabricate a mold that will be used for mass production processes such as nanoimprint, PDMS casting, and others. The objective of this study is to fabricate the silicon stamper for PDMS casting process by a mastless fabrication technique using the combination of nano/micro machining by Nanoindenter XP and KOH wet etching. Effect of the Berkovich tip alignment on the deformation was investigated. Grooves were machined on a silicon surface, which has native oxide on it, by constant load scratch (CLS), and they were etched in KOH solutions to investigate chemical characteristics of the machined silicon surface. After the etching process, the convex structures was made because of the etch mask effect of the mechanically affected layer generated by nanoscratch. On the basis of this fact, some line patterns with convex structures were fabricated. Achieved groove and convex structures were used as a stamper for PDMS casting process.

• ETRI Journal
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• v.35 no.6
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• pp.1152-1155
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• 2013

A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.887-890
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• 1997

Recently micromachining using DPSSL(Diode Pumped Solid State Laser) with 3rd harmonic wavelength is actively studied in laser machining area. Micromachining using DPSSL have outstanding advantages as UV source comparing with excimer laser in various aspect such a maintenance cost, maskless machining, high repetition rate and so on. In this study micro-drilling of PCB type substrate which consists of Cu-PI-Cu layer was performed using DPSS Nd:YAG laser(355nm, wavelength) in vector scanning method. Experimental and numerical method(Matlab simulation, FEM) are used to optimize process parameter and control machining depth. The man mechanism of this process is laser ablation. It is known that there is large gap between energy threshold of copper and that of PI. Matlab simulation considering energy threshold of material is performed to effect of duplication of pulse and FEM thermal analysis is used to predict the ablation depth of copper. This study could be widely used in various laser micromachining including via hole microdrilling of PCB, and micromachining of semiconductor components, medical parts and printer nozzle and so on.

• Korean Journal of Optics and Photonics
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• v.15 no.4
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• pp.309-312
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• 2004

Two-dimensionally arrayed nanocolumn lattices were fabricated by using double-exposure laser holographic method. The hexagonal lattice was formed by rotating the sample with 60 degree while the square lattice by 90 degree before the second laser-exposure. The size and period of nanocolumns could be controlled accurately from 125 to 145 nm in diameter and 220 to 290 nm in period for square lattice by changing the incident angle of laser beam. The reactive ion etching for a typical time of 30 min using CH$_4$/H$_2$ plasma enhanced the aspect-ratio by more than 1.5 with a slight increase of the bottom width of columns.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.204-204
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• 2010

본 연구에서는 Glass 기판 위에 우수한 광 투과도를 갖는 ZnO 기반의 Thin Film Transistor (TFT)를 제작하였으며, 이에 대한 전기적 및 광학적 특성을 분석하였다. 소자 구조의 제작은 Maskless Aligner를 이용한 Optical lithograph법을 이용하였다. 채널층은 ZnO로 하였고 Source/Drain 영역은 GaZnO로 하여 전체구조가 ZnO 기반의 homogeneity를 유지하게 하였다. 이때 Gate 절연막은 Bi1.5Zn1Nb1.5O7와 SiO2 두가지 종류로 하여 각각의 특성을 비교하였다. 본연구에서 TFT구조의 각 층은 모두 r. f. 마그네트론 스퍼터법으로 증착하였다. 제작된 TFT들은 채널층 및 절연막 형성 등에 관여된 세부적 실험변수의 변화에 관계없이 약 75% 이상의 우수한 광투과도 특성을 보였다. 전기적 특성 평가에서, 제작된 TFT들은 전반적으로 비교적 낮은 문턱전압과 높은 이동도를 보였다. 하지만, 트랜지스터의 전기적 전송 특성의 주요 인자들인 채널-이동도, 스위칭, 누설 및 이력 등은 ZnO 채널층 혹은 Bi1.5Zn1Nb1.5O7 절연막 형성 시 주입되는 O2 가스의 분압에 의존하는 것이 관측되었다. 이를 통하여 트랜지스터의 각 세부 영역의 구조 및 형성 조건이 트랜지스터의 전기적 특성에 미치는 영향과 상관관계에 대하여 논의한다.

• Proceedings of the Korean Society of Laser Processing Conference
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• 2005.11a
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• pp.37-41
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• 2005

When screen size of the Flat Panel Display (FPD) becomes larger, the traditional photo-lithography using photomasks and UV lamps might not be possible to make patterns on Photo Resist (PR) material due to limitation of the mask size. Though the maskless photo-lithography using UV lasers and scanners had been developed to implement large screen display, it was very slow to apply the process for mass-production systems. The laser exposure system using 405 nm semi-conductor lasers and Digital Micromirror Devices (DMD) has been developed to overcome above-mentioned problems and make more than 100 inches FPD devices. It makes very fine patterns for full HD display and exposes them very fast. The optical engines which contain DMD, Micro Lens Array (MLA) and projection lenses are designed for 10 to 50 ${\mu}m$ bitmap pattern resolutions. The test patterns for LCD and PDP displays are exposed on PR and Dry Film Resists (DFR) which are coated or laminated on some specific substrates and developed. The fabricated edges of the sample patterns are well-defined and the results are satisfied with tight manufacturing requirements.

• Transactions on Electrical and Electronic Materials
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• v.4 no.5
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• pp.10-14
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• 2003

A low-cost, large area, random, maskless texturing scheme independent of crystal orientation is expected to have significant impact on terrestrial photovoltaic technology. We investigated silicon surface microstructures formed by reactive ion etching (R IE) in Multi-Hollow cathode system. Desirable texturing effect has been achieved when radio-frequency (rf) power of about 20 Watt per one hollow cathode glow is applied for our RF Multi -Hollow cathode system. The black silicon etched surface shows almost zero reflectance in the visible region as well as in near IR region. The etched silicon surface is covered by columnar microstructures with diameters from 50 to 100 nm and depth of about 500 nm. We have successfully achieved 11.7 % efficiency of mono-crystalline silicon solar cell and 10.2 % for multi-crystalline silicon solar cell.

• Journal of the Korean institute of surface engineering
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• v.50 no.5
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• pp.315-321
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• 2017

Antireflective pyramid arrays can be readily obtained via anisotropic etching in alkaline solution (KOH, NaOH), which is widely used in crystalline-Si (c-Si) solar cells. The periodic inverted pyramid arrays show even lower light reflectivity because of their superior light-trapping characteristics. Since this inverted pyramidal structures are mostly achieved using very complex techniques such as photolithograpy and laser processes requiring extra costs, here, we demonstrate the Cu-nanoparticle assisted chemical etching processes to make the inverted pyramidal arrays without the need of photolithography. We have mainly controlled the concentration of $Cu(NO_3)_2$, HF, $H_2O_2$ and temperature as well as time factors that affecting the reaction. Optimal inverted pyramid structure was obtained through reaction parameters control. The reflectance of inverted pyramid arrays showed < 10% over 400 to 1100 nm wavelength range while showing 15~20% in random pyramid arrays.

• Transactions of Materials Processing
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• v.12 no.7
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• pp.640-646
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• 2003

The nanoprobe based on lithography, mainly represented by SPM based technologies, has been recognized as potential application to fabricate the surface nanostructures because of its operational versatility and simplicity. The objective of the work is to suggest new mastless pattern fabrication technique using the combination of machining by nanoindenter and KOH wet etching. The scratch option of the nanoindenter is a very promising method for obtaining nanometer scale features on a large size specimen because it has a very wide working area and load range. Sample line patterns were machined on a silicon surface, which has a native oxide on it, by constant load scratch (CLS) of the Nanoindenter with a Berkovich diamond tip, and they were etched in KOH solutions to investigate chemical characteristics of the machined silicon surface. After the etching process, the convex structure was made because of masking effect of the affected layer generated by nano-scratch. On the basis of this fact, some line patterns with convex structures were fabricated. Achieved patterns can be used as a mold that will be used for mass production processes such as nanoimprint or PDMS molding process. All morphological data of scratch traces were scanned using atomic force microscope (AFM).