• The monthly packaging world
• /
• s.277
• /
• pp.45-66
• /
• 2016

산업통상자원부가 주최하고 한국생산기술연구원이 주관하는 "제10회 미래패키징 신기술 정부포상"시상식이 4월 26일 일산 킨텍스 그랜드볼룸에서 열렸다. 정부포상제도는 미래지식산업인 패키징산업 종사자의 긍지와 자부심 함양의 계기를 실천하고, 패키징산업 종사자의 사기진작과 패키징산업 활성화를 도모하는데 그 목적이 있다. 또한 한국국제포장기자재전(KOREA PACK)과의 동시개최로 패키징산업 종사자간 정보교류 극대화 및 공동체 의식 함양으로 일체감을 조성함은 물론, 패키징산업 기술인의 기술개발 의욕을 고취한다는 평가를 받고 있다. 제10회 미래패키징 신기술 정부포상 시상식에서는 코리아스타상 기업부문, 학생부문, 공로부문으로 구분하여 시상이 진행됐다. 기업부문은 패키징 완제품, 친환경패키징, 패키징관련기계(설비) 및 관련부품, 패키징인쇄(라벨링), 패키징원부자재 생산 및 가공공정, 패키징디자인 등의 분야에서 신기술 개발 또는 개선으로 수출 신장, 매출 수익 증대 및 발명특허 획득을 통해 패키징 기술력 발전에 기여한 기업의 패키징제품 또는 패키징디자인을 대상으로 진행되고 있으며 학생부문은 패키징 디자인 관련분야 전공자로 패키징과 연관된 컨셉으로 상품성, 창의성, 표현성, 친환경성, 지속가능성 등이 어우러진 독창적인 패키징제품 또는 패키징디자인을 대상으로 한다. 또한 공로부문은 패키징 산업 관련 산업계, 학계, 연구계, 유관기관에 종사하는 자로서 패키징 관련 핵심 기술개발, 경영, 마케팅 면에서 패키징 산업 발전에 기여한 공적이 뚜렷한 자, 패키징산업발전 정책연구 및 패키징산업 육성에 기여한 기업 또는 개인을 대상으로 하고 있다. 이번 행사에서는 기업부문 29개 제품과, 학생 14명, 공로 2명에 대한 포상이 진행, 국무총리상에는 (주)더우주의 '우주 페이스 마스크(OOZOO FACE MASK)'가 수상했으며, 산업통상자원부장관상에는 현대글로비스(주)외 2개사, 한국생산기술연구원장상에는 (주)풀무원 외 10개사가 수상했다. 학생부문에서는 안양대학교가 산업통상자원부장관상을 수상했다. 공로부문으로 진행된 시상식에서는 서영철 Flair Flexible Packaging 대표이사와 이명훈 한국포장시스템연구소장이 산업통상자원부장관 표창을 받았다. 본 고에서는 제10회 미래패키징 신기술 정부포상 수상작들을 살펴봄으로써 최신 패키징 경향에 대해 알아보도록 한다.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2005.09a
• /
• pp.201-212
• /
• 2005

[ $Epoxy/BaTiO_3$ ] composite embedded capacitor films (ECFs) were newly designed fur high dielectric constant and low tolerance (less than ${\pm}15\%$) embedded capacitor fabrication for organic substrates. In terms of material formulation, ECFs are composed of specially formulated epoxy resin and latent curing agent, and in terms of coating process, a comma roll coating method is used for uniform film thickness in large area. Dielectric constant of $BaTiO_3\;&\;SrTiO_3$ composite ECF is measured with MIM capacitor at 100 kHz using LCR meter. Dielectric constant of $BaTiO_3$ ECF is bigger than that of $SrTiO_3$ ECF, and it is due to difference of permittivity of $BaTiO_3\;and\;SrTiO_3$ particles. Dielectric constant of $BaTiO_3\;&\;SrTiO_3$ ECF in high frequency range $(0.5\~10GHz)$ is measured using cavity resonance method. In order to estimate dielectric constant, the reflection coefficient is measured with a network analyzer. Dielectric constant is calculated by observing the frequencies of the resonant cavity modes. About both powders, calculated dielectric constants in this frequency range are about 3/4 of the dielectric constants at 1 MHz. This difference is due to the decrease of the dielectric constant of epoxy matrix. For $BaTiO_3$ ECF, there is the dielectric relaxation at $5\~9GHz$. It is due to changing of polarization mode of $BaTiO_3$ powder. In the case of $SrTiO_3$ ECF, there is no relaxation up to 10GHz. Alternative material for embedded capacitor fabrication is $epoxy/BaTiO_3$ composite embedded capacitor paste (ECP). It uses similar materials formulation like ECF and a screen printing method for film coating. The screen printing method has the advantage of forming capacitor partially in desired part. But the screen printing makes surface irregularity during mask peel-off, Surface flatness is significantly improved by adding some additives and by applying pressure during curing. As a result, dielectric layer with improved thickness uniformity is successfully demonstrated. Using $epoxy/BaTiO_3$ composite ECP, dielectric constant of 63 and specific capacitance of 5.1nF/cm2 were achieved.

• Journal of the Korean Ceramic Society
• /
• v.46 no.1
• /
• pp.30-34
• /
• 2009

A Sand blasting technology has been used to address via and trench processing of glass wafer of optic semiconductor packaging. Manufactured sand blast that is controlled by blast nozzle and servomotor so that 8" wafer processing may be available. 10mm sq test device manufactured by Dry Film Resist (DFR) pattern process on 8" glass wafer of $500{\mu}m's$ thickness. Based on particle pressure and the wafer transfer speed, etch rate, mask erosion, and vertical trench slope have been analyzed. Perfect 500 um tooling has been performed at 0.3 MPa pressure and 100 rpm wafer speed. It is particle pressure that influence in processing depth and the transfer speed did not influence.

• Proceedings of the KWS Conference
• /
• 2006.10a
• /
• pp.190-192
• /
• 2006

The 3-dimensional(3D) chip stacking technology is one of the leading technologies to realize a high density and high performance system in package(SIP). It could be found that it is the advanced process of through-hole via formation with the minimum damaged on the Si-wafer. Laser ablation is very effective method to penetrate through hole on the Si-wafer because it has the advantage that formed under $100{\mu}m$ diameter through-hole via without using a mask. In this paper, we studied the optimum method for a formation of through-hole via using femto-second laser heat sources. Furthermore, the processing parameters of the specimens were several conditions such as power of output, pulse repetition rate as well as irradiation method and time. And also the through-hole via form could be investigated and analyzed by microscope and analyzer.

• Proceedings of the Korean Society for Technology of Plasticity Conference
• /
• 1999.08a
• /
• pp.10-21
• /
• 1999

Recent progress in manufacture of hot and cold rolled steel strip products and their applications were reviewed. The main trend in the technological development has been to meet the customers' requests for quality improvement and cost reduction. The weight reduction to reduce the fuel consumption is the main issue in the automotive industry and, therefore, various steels have been developed to improve formability as well as strength. The steels include super-EDDQ steels, bainitic steels, TRIP steels, etc. In the oil industry, efforts have been focused to improve strength together with either low temperature toughness or HIC/SSCC resistance. The packaging industry is also a highly competitive market, and steel and canmaking companies have worked cooperatively to develop cost-effective canmaking processes as well as high performance steels. This type of cooperation has also been found important in other industries such as the appliance and electronic industries for the benefits of both steelmakers and customers.

• Journal of the Microelectronics and Packaging Society
• /
• v.16 no.4
• /
• pp.33-39
• /
• 2009

A microlens array (MLA) was developed based on the wet-etched quartz substrate and coating of UV adhesive on the substrate for maskless lithography application. The developed MLA has the focal length of ${\sim}45\;{\mu}m$ and the spot size of ${\sim}1\;{\mu}m$. The spot size of the focused beam passing through the MLA was detected by CCD camera, and its intensity was monitored by beam profiler. Uniform spots with nearly identical intensities were observed on the focal plane when a beam passes through the fabricated MLA. The focal length was varied depending on thickness of the coated UV adhesive. The thicker the thickness of the UV adhesive was, the shorter the focal length of the MLA was. With a general mask aligner, UV beam focusing was tested onto photoresist (PR). The beams were well focused onto PR when UV passes through the MLA. Depending on the variable distances from the MLA, beam sizes onto PR were controlled. Even at high temperature for a long time, the performances of the MLA were not changed.

• Journal of the Microelectronics and Packaging Society
• /
• v.21 no.3
• /
• pp.67-71
• /
• 2014

An attempt to grow high quality GaN on silicon substrate using metal organic chemical vapor deposition (MOCVD), herein GaN epitaxial layers were grown on various Si(111) substrates. Thin Platinum layer was deposited on Si(111) substrate using sputtering, followed by thermal annealing to form Pt nano-clusters which act as masking layer during dry-etched with inductively coupled plasma-reactive ion etching to generate nano-patterned Si(111) substrate. In addition, micro-patterned Si(111) substrate with circle shape was also fabricated by using conventional photo-lithography technique. GaN epitaxial layers were subsequently grown on micro-, nano-patterned and conventional Si (111) substrate under identical growth conditions for comparison. The GaN layer grown on nano-patterned Si (111) substrate shows the lowest crack density with mirror-like surface morphology. The FWHM values of XRD rocking curve measured from symmetry (002) and asymmetry (102) planes are 576 arcsec and 828 arcsec, respectively. To corroborate an enhancement of the growth quality, the FWHM value achieved from the photoluminescence spectra also shows the lowest value (46.5 meV) as compare to other grown samples.

• Journal of the Microelectronics and Packaging Society
• /
• v.27 no.1
• /
• pp.55-65
• /
• 2020

The use of underfill materials in semiconductor packages is not only important for stress relieving of the package, but also for improving the reliability of the package during shock and vibration. However, in recent years, as the size of the package becomes larger and very thin, the use of the underfill shows adverse effects and rather deteriorates the reliability of the package. To resolve these issues, we developed the package using a solid epoxy material to improve the reliability of the package as a substitute for underfill material. The developed solid epoxy was applied to the package of the application processor in smart phone, and the reliability of the package was evaluated using thermal cycling reliability tests and numerical analysis. In order to find the optimal solid epoxy material and process conditions for improving the reliability, the effects of various factors on the reliability, such as the application number of solid epoxy, type of PCB pad, and different solid epoxy materials, were investigated. The reliability test results indicated that the package with solid epoxy exhibited higher reliability than that without solid epoxy. The application of solid epoxy at six locations showed higher reliability than that of solid epoxy at four locations indicating that the solid epoxy plays a role in relieving stress of the package, thereby improving the reliability of the package. For the different types of PCB pad, NSMD (non-solder mask defined) pad showed higher reliability than the SMD (solder mask defined) pad. This is because the application of the NSMD pad is more advantageous in terms of thermomechanical stress reliability because the solderpad bond area is larger. In addition, for the different solid epoxy materials with different thermal expansion coefficients, the reliability was more improved when solid epoxy having lower thermal expansion coefficient was used.

• Journal of the Microelectronics and Packaging Society
• /
• v.20 no.4
• /
• pp.59-63
• /
• 2013

In this paper, the impact of the copper densities of substrate layers on IC package warpage is studied experimentally and numerically. The substrate strips used in this study contained two metal layers, with the metal densities and patterns of these two layers varied to determine their impacts. Eight legs of substrate strips were prepared. Leg 1 to leg 5 were prepared with a HD (high density) type of strip and leg 6 to leg 8 were prepared with UHD (ultra high density) type of strip. The top copper metal layer was designed to feature meshed patterns and the bottom copper layer was designed to feature circular patterns. In order to consider the process factors, the warpage of the substrate bottom was measured step by step with the following manufacturing process: (a) bare substrate, (b) die attach, (c) applying mold compound (d) and post reflow. Furthermore, after the post reflow step, the substrate strips were diced to obtain unit packages and the warpage of the unit packages was measured to check the warpage trends and differences. The experimental results showed that the warpage trend is related to the copper densities. In addition to the experiments, a Finite Element Modeling (FEM) was used to simulate the warpage. The nonlinear material properties of mold compound, die attach, solder mask, and substrate core were included in the simulation. Through experiment and simulation, some observations were concluded.

• Journal of the Microelectronics and Packaging Society
• /
• v.11 no.4 s.33
• /
• pp.23-27
• /
• 2004

The $Al_xTa_{1-x} (x=0.0{\~}1.0)$ alloy thin films were deposited by RF-magnetron sputtering system, and the crystal quality, surface morphology, and electrical properties were examined using XRD, AFM, 4-point probe techniques in this study. The thin films were grown according to the alloy compositions first, and the effects of film thickness and mask patterns were investigated afterwards. Also, the heating characteristics were examined by heat controller. The obtained results showed that the high electrical resistivity was obtained for Al content $x=6.63at\%$, and the even higher resistivity was accomplished for the samples with smaller thickness and narrower width. The heating temperature demonstrated the identical trend to the electrical properties, and the highest heating temperature ($400^{\circ}C$) and output power ($12.6W/cm^2$) were obtained for the sample with Al content $x=6.63\%$, film thickness d=500 nm, film width w=1.5 mm.