• Title/Summary/Keyword: mapping size

Search Result 383, Processing Time 0.03 seconds

Image Coding by Block Based Fractal Approximation (블록단위의 프래탈 근사화를 이용한 영상코딩)

  • 정현민;김영규;윤택현;강현철;이병래;박규태
    • Journal of the Korean Institute of Telematics and Electronics B
    • /
    • v.31B no.2
    • /
    • pp.45-55
    • /
    • 1994
  • In this paper, a block based image approximation technique using the Self Affine System(SAS) from the fractal theory is suggested. Each block of an image is divided into 4 tiles and 4 affine mapping coefficients are found for each tile. To find the affine mapping cefficients that minimize the error between the affine transformed image block and the reconstructed image block, the matrix euation is solved by setting each partial differential coefficients to aero. And to ensure the convergence of coding block. 4 uniformly partitioned affine transformation is applied. Variable block size technique is employed in order to applynatural image reconstruction property of fractal image coding. Large blocks are used for encoding smooth backgrounds to yield high compression efficiency and texture and edge blocks are divided into smaller blocks to preserve the block detail. Affine mapping coefficinets are found for each block having 16$\times$16, 8$\times$8 or 4$\times$4 size. Each block is classified as shade, texture or edge. Average gray level is transmitted for shade bolcks, and coefficients are found for texture and edge blocks. Coefficients are quantized and only 16 bytes per block are transmitted. Using the proposed algorithm, the computational load increases linearly in proportion to image size. PSNR of 31.58dB is obtained as the result using 512$\times$512, 8 bits per pixel Lena image.

  • PDF

Yield Mapping of a Small Sized Paddy Field (소구획 경지에서의 벼 수확량 지도 작성)

  • 정선옥;박원규;장영창;이동현;박우풍
    • Journal of Biosystems Engineering
    • /
    • v.24 no.2
    • /
    • pp.135-144
    • /
    • 1999
  • An yield monitoring system plays a key role in precision farming. An yield monitoring system and a DGPS were implemented to a widely used domestic combine for yield mapping of a small sized paddy field, and yield mapping algorithms were investigated in this study. The yield variation in the 0.1ha rice paddy field was measured by installing a yield flow sensor and a grain moisture sensor at the end of the clean grain elevator discharging grains into a grain tank. Yield map of the test filed was drawn in a point map and a linear interpolated map based on the result of the field test. The size of a unit yield grid in yield mapping was determined based on the combine traveling speed, effective harvesting width and data storing period. It was possible to construct the yield map of a small sized paddy field.

  • PDF

Efficient FTL Mapping Management for Multiple Sector Size-based Storage Systems with NAND Flash Memory (다중 섹터 사이즈를 지원하는 낸드 플래시 메모리 기반의 저장장치를 위한 효율적인 FTL 매핑 관리 기법)

  • Lim, Seung-Ho;Choi, Min
    • Journal of KIISE:Computing Practices and Letters
    • /
    • v.16 no.12
    • /
    • pp.1199-1203
    • /
    • 2010
  • Data transfer between host system and storage device is based on the data unit called sector, which can be varied depending on computer systems. If NAND flash memory is used as a storage device, the variant sector size can affect storage system performance since its operation is much related to sector size and page size. In this paper, we propose an efficient FTL mapping management scheme to support multiple sector size within one NAND flash memory based storage device, and analyze the performance effect and management overhead. According to the proposed scheme, the management overhead of proposed FTL management is lower than conventional scheme when various sector sizes are configured in computer systems, while performance is less degraded in comparison with single sector size support system.

An Efficient Cache Management Scheme of Flash Translation Layer for Large Size Flash Memory Drives

  • Choi, Hwan-Pil;Kim, Yong-Seok
    • Journal of the Korea Society of Computer and Information
    • /
    • v.20 no.11
    • /
    • pp.31-38
    • /
    • 2015
  • Nowadays, large size flash memory drives with more than a couple of hundreds of gigabytes are common. This paper presents an efficient cache management scheme of flash translation layer, called TPC-FTL, for large size flash memory drives. Since flash drives of large size usually contain large size RAM, we can enhance the performance of page mapping cache by using more RAM for the cache. But if the size exceeds a threshold, the existing schemes are impractical for real devices, because the time for cache manipulation becomes too long. TPC-FTL manages the cache in translation page unit, not in logical page number unit used in existing schemes. Since a translation page covers a large number of logical page numbers (for example, 512 for 2KB size page), the number of cache elements can be reduced up to a practical level. A performance evaluation shows that average response time, an important performance measure, is better than existing schemes via the effect of utilizing spacial locality in addition to temporal locality.

Grain Size Relate Gene in CNDH, and Identification Of Shape Based on QTL Mapping in Rice

  • Ji-Hun Kim;Jae-Ryoung Park;Yoon-Hee Jang;Eun-Gyeong Kim;Kyung-Min Kim
    • Proceedings of the Korean Society of Crop Science Conference
    • /
    • 2022.10a
    • /
    • pp.279-279
    • /
    • 2022
  • Rice is 34% of the world's population used as a staple food. But the world population is increasing. Food security is not well protected. Improving cultivar development can address food security. Quantitative trait locus (QTL) mapping is a statistical analysis using both phenotypic and genotypic dates. The purpose of QTL mapping is to determine a gene. Increasing grain size is a way to increase yield in rice. Grain size-related genes were mapped using CNDH population obtained by cross-breeding Cheongcheong (Indica) and Nagdong (Japonica) through anther culture. Grain harvested from experimental field of Kyungpook National University in Gunwi in 2021. Genes related to grain length were detected between RM5964-RM12285, RM20924-RM20967 in chromosome 1, 7. LOD score is 5.88 and 5.6. Genes related to grain width was detected between RM289-RM18130 in chromosome 5. LOD score is 4.57. Genes related to grain length/width ratio were detected between RM5459-RM3482, RM5699-RM1211 and RM3838-RM3381 in chromosome 1, 2, 5. LOD score is 3.75, 3.14 and 3.41. 4 genes was detected in chromosome 1 and 2 genes was detected in chromosome 2 and 7 genes was detected in chromosome 5. 2 genes related to grain shape and quality were detected. 4 genes related to grain length were detected. 4 genes related to grain size were detected. 1 gene related to grain size and weight was detected. 2 genes related to grain length and weight were detected. By finding the gene related to grain size, it provides food to people threatened by food security and solves the food shortage.

  • PDF

Improvement Target SW Process Selection for Small and Medium Size Software Organizations (중소 소프트웨어 기업의 개선 대상 SW 프로세스 선정)

  • Lee, Yang-Kyu;Kim, Jong-Woo;Kwon, Won-Il;Jung, Chang-Sin;Bae, Se-Jin
    • The KIPS Transactions:PartD
    • /
    • v.9D no.5
    • /
    • pp.887-896
    • /
    • 2002
  • Based on SPICE (Software Process Improvement and Capability dEtermination) evaluation model, SPIRE (Software Process Improvement in Regions of Europe) is developed and published as a process improvement model for small and medium size organizations. However, practical selection guidelines or mapping rules between business goals and software processes do not exist within SPIRE. This research aims to construct an objective reference mapping table between business goals and software processes, and to propose a process selection method using the mapping table. The mapping table is constructed by the convergence of domestic software process experts' opinions using Delphi techniques. In the suggested process selection method, target processes are selected using the intuition of project participants or project managers as well as the reference mapping table. The feasibility of the proposed selection method has been reviewed by applying to two small software companies. Using the reference mapping table, we could select key processes which were passed over by project managers.

Janus-FTL Adjusting the Size of Page and Block Mapping Areas using Reference Pattern (참조 패턴에 따라 페이지 및 블록 사상 영역의 크기를 조절하는 Janus-FTL)

  • Kwon, Hun-Ki;Kim, Eun-Sam;Choi, Jong-Moo;Lee, Dong-Hee;Noh, Sam-H.
    • Journal of KIISE:Computing Practices and Letters
    • /
    • v.15 no.12
    • /
    • pp.918-922
    • /
    • 2009
  • Naturally, block mapping FTL works well for sequential writes while page mapping FTL does well for random writes. To exploit their advantages, a practical FTL should be able to selectively apply a suitable scheme between page and block mappings for each write pattern. To meet that requirement, we propose a hybrid mapping FTL, which we call Janus-FTL, that distributes data to either block or page mapping areas. Also, we propose the fusion operation to relocate the data from block mapping area to page mapping area and the defusion operation to relocate the data from page mapping area to block mapping area. And experimental results of Janus-FTL show performance improvement of maximum 50% than other hybrid mapping FTLs.

HAMM(Hybrid Address Mapping Method) for Increasing Logical Address Mapping Performance on Flash Translation Layer of SSD (SSD 플래시 변환 계층 상에서 논리 주소 매핑의 성능 향상을 위한 HAMM(Hybrid Address Mapping Method))

  • Lee, Ji-Won;Roh, Hong-Chan;Park, Sang-Hyun
    • The KIPS Transactions:PartD
    • /
    • v.17D no.6
    • /
    • pp.383-394
    • /
    • 2010
  • Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.

A Parallelising Algortithm for Matrix Arithmetics of Digital Signal Processings on VLIW Simulator (VLIW 시뮬레이터 상에서의 디지털 신호처리 행렬 연산에 대한 병렬화 알고리즘)

  • Song, Jin-Hee;Jun, Moon-Seog
    • The Transactions of the Korea Information Processing Society
    • /
    • v.5 no.8
    • /
    • pp.1985-1996
    • /
    • 1998
  • A parallelising algorithm for partitioning and mapping methods of matrix/vector multiplication into linear processor array/VLW simulator is presented in this paper. First we discuss the mapping methods for input matrix or vector into the arbitrarily size of processor arrays. Then, we show partitioning the algorithmss of the large size of computational problem into the size of the processor array. We execute the algorithm on VLIW simuhator and show to effectiviness of algorithm. The result which we achived better parallelising performance on our VLIW simulator dsign than on linear processor array.

  • PDF

Mapping IFC to Object-oriented Relational Database (IFC의 객체기반 관계형 데이터베이스로의 매핑)

  • Kim, Seon-Woo;Lee, Ghang
    • Proceedings of the Korean Institute Of Construction Engineering and Management
    • /
    • 2007.11a
    • /
    • pp.301-305
    • /
    • 2007
  • Mapping of EXPRESS, which is object-favored language to represent IFC model, to Relational Database is not straightforward. Model size can be much bigger and data can be missed through process. However mapping to the object concept added database, such as Object Oriented Database or Object Relational Database, may be simpler and have lots of advantages. This study investigates previous IFC mapping studies, concept of Relational Database and Object Oriented Database, and mapping methodology to Object Relational Database using object.

  • PDF