• Title/Summary/Keyword: low voltage circuit design

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Improved Deadbeat Current Controller with a Repetitive-Control-Based Observer for PWM Rectifiers

  • Gao, Jilei;Zheng, Trillion Q.;Lin, Fei
    • Journal of Power Electronics
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    • v.11 no.1
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    • pp.64-73
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    • 2011
  • The stability of PWM rectifiers with a deadbeat current controller is seriously influenced by computation time delays and low-pass filters inserted into the current-sampling circuit. Predictive current control is often adopted to solve this problem. However, grid current predictive precision is affected by many factors such as grid voltage estimated errors, plant model mismatches, dead time and so on. In addition, the predictive current error aggravates the grid current distortion. To improve the grid current predictive precision, an improved deadbeat current controller with a repetitive-control-based observer to predict the grid current is proposed in this paper. The design principle of the proposed observer is given and its stability is discussed. The predictive performance of the observer is also analyzed in the frequency domain. It is shown that the grid predictive error can be decreased with the proposed method in the related bode diagrams. Experimental results show that the proposed method can minimize the current predictive error, improve the current loop robustness and reduce the grid current THD of PWM rectifiers.

The Design and Fabrication of Capacitive Humidity Sensor Having Interdigit Electrodes and its Signal Conditional Circuitry (빗살형 전극을 가지는 정전용량형 습도센서와 그 신호처리회로의 설계와 제작)

  • Park, Se-Kwang;Kang, Jeong-Ho;Park, Jin-Su
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.3
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    • pp.144-148
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    • 2001
  • For the purpose of developing capacitive humidity sensor having interdigit electrodes, interdigit electrode was modeled and simulated to obtain capacitance and sensitivity as a function of geometric parameters like the structural gap and thichness. For the development of ASIC, switched capacitor signal conditioning circuits for capacitive humidity sensor were designed and simulated by cadence using 0.25um CMOS process parameters. The signal conditioning circuits are composed of amplifier for voltage gain control, and clock generator for sensor driving and switch control The characteristics of the fabricated sensors are; 1) sensitivity is 9fF/%R.H., 2) temperature coefficient of offset(TCO) is 0.4%R.H./$^{\circ}C$, 3) nonlinearity is 1.2%FS, 4) hysteresis is 1.5%FS in humidity range of 3%R.H. ${\sim}$ 98%R.H.. The response time is 50 seconds in adsorption and 70 seconds in desorption. Fabricated process used in this capacitive humidity sensor having interdigit electrode are just as similar as conventional IC process technology. Therefore this can be easily mass produced with low cost, simple circuit and utilized in many applications for both industrial and environmental measurement and control system, such as monitoring system of environment, automobile, displayer, IC process room, and laboratory etc..

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A Single-phase Buck-boost AC-AC Converter with Three Legs

  • Zhou, Min;Sun, Yao;Su, Mei;Li, Xing;Liu, Fulin;Liu, Yonglu
    • Journal of Electrical Engineering and Technology
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    • v.13 no.2
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    • pp.838-848
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    • 2018
  • This paper proposes a single-phase buck-boost AC-AC converter. It consists of three legs with six switching units (each unit is composed of an active switch and a diode) and its input and output ports share a common ground. It can provide buck-boost voltage operation and immune from shoot-through problem. Since only two switching units are involved in the current paths, the conduction losses are low, which improves the system efficiency. The operation principle of the proposed circuit is firstly presented, and then, various operation conditions are introduced to achieve different output voltages with step-changed frequencies. Additionally, the parameters design and comparative analysis of the power losses are also given. Finally, experimental results verify the correctness of the proposed converter.

A Study on the Design of D/A Converter based on Data Weighted Average Technique for enhancement of reliability (혼합형 전류 구동 D/A 컨버터 설계 제작에 있어서 데이터 가중평균기법을)

  • Kim, S.D.;Woo, Y.S.;Kim, D.G.;Sung, M.Y.
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3215-3217
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    • 1999
  • In this paper, a new structure of realizing switching control logic for Data Weighted Average Technique is suggested. It uses memory and adder for summing past binary input and this summed data is used to select one switch in control logic. This control logic acts in parallel regardless of resolution so increasing resolution don't affect on converting speed. In this reason, high speed and high resolution D/A converter based on Data Weighted Average Technique could be made. In this paper, 4 bits current mode thermometer code D/A converter is degined and simulated by using HSPICE. Simulated results show that new structure of D/A converter has more than 250MHz converting speed and less than 0.0003[LSB] INL error. It is very useful in low power circuit because of using 3.3 V supply voltage.

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Single-Phase Bridgeless Zeta PFC Converter with Reduced Conduction Losses

  • Khan, Shakil Ahamed;Rahim, Nasrudin Abd.;Bakar, Ab Halim Abu;Kwang, Tan Chia
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.356-365
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    • 2015
  • This paper presents a new single phase front-end ac-dc bridgeless power factor correction (PFC) rectifier topology. The proposed converter achieves a high efficiency over a wide range of input and output voltages, a high power factor, low line current harmonics and both step up and step down voltage conversions. This topology is based on a non-inverting buck-boost (Zeta) converter. In this approach, the input diode bridge is removed and a maximum of one diode conducts in a complete switching period. This reduces the conduction losses and the thermal stresses on the switches when compare to existing PFC topologies. Inherent power factor correction is achieved by operating the converter in the discontinuous conduction mode (DCM) which leads to a simplified control circuit. The characteristics of the proposed design, principles of operation, steady state operation analysis, and control structure are described in this paper. An experimental prototype has been built to demonstrate the feasibility of the new converter. Simulation and experimental results are provided to verify the improved power quality at the AC mains and the lower conduction losses of the converter.

A Design of Power Management IC for CCD Image Sensor (CCD 이미지 센서용 Power Management IC 설계)

  • Koo, Yong-Seo;Lee, Kang-Yoon;Ha, Jae-Hwan;Yang, Yil-Suk
    • Journal of IKEEE
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    • v.13 no.4
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    • pp.63-68
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    • 2009
  • The power management integrated circuit(PMIC) for CCD image sensor is presented in this study. A CCD image sensor is very sensitive against temperature. The temperature, that is heat, is generally generated by the PMIC with low efficiency. Since the generated heat influences performance of CCD image sensor, it should be minimized by using a PMIC which has a high efficiency. In order to develop the PMIC with high efficiency, the input stage is designed with synchronous type step down DC-DC converter. The operating range of the converter is from 5V to 15V and the converter is controlled using PWM method. The PWM control circuit consists of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit. The saw-tooth generator is designed with 1.2MHz oscillation frequency. The comparator is designed with the two stages OP Amp. And the error amplifier has 40dB DC gain and $77^{\circ}$ phase margin. The output of the step down converter is connected to input stage of the charge pump. The output of the charge pump is connected to input of the LDO which is the output stage of the PMIC. Finally, the PMIC, based on the PWM control circuit and the charge pump and the LDO, has output voltage of 15V, -7.5V, 3.3V and 5V. The PMIC is designed with a 0.35um process.

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A Study on the ZVZCS Three Level DC/DC Converter without Primary Freewheeling Diodes (1차측 환류 다이오드를 제거한 ZVZCS Three Level DC/DC 컨버터에 관한 연구)

  • Bae, Jin-Yong;Kim, Yong;Baek, Soo-Hyun;Kwon, Soon-Do;Kim, Pil-Soo;Gye, Sang-Bum
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.6
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    • pp.66-73
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    • 2002
  • This paper presents ZVZCS(Zero-Voltage and Zero-Current Switching) Three Level DC/DC Converter without primary freewheeling diodes. The new converter presented in this paper used a phase shirt control with a flying capacitor in the primary side to achieve ZVS for the outer switches. A secondary anxiliary circuit which consists of one small capacitor, two small diodes and one coupled inductor, is added in the secondary to provide ZVZCS conditions to primary switches, ZVS for outer switches and ZCS for inner switches. Many advantages include simple secondary auxiliary circuit topology, high efficiency, and low cost make the new converter attractive for high power applications. Also the circulating current flows through the circuit so that it causes the needless coduction loss to be occurred in the devices and the transformer of the circuit The new converter has no primary auxiliary diodes for freewheeling current. The principle of operation, feature and design considerations are illustrated and verified through the experiment with a 1[㎾] 50[KHz]IGBT based experimental circuit.

Highly Linear Wideband LNA Design Using Inductive Shunt Feedback (Inductive Shunt 피드백을 이용한 고선형성 광대역 저잡음 증폭기)

  • Jeonng, Nam Hwi;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1055-1063
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    • 2013
  • Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

Enhancement of Photovoltaic Performance of Fluorescence Materials added TiO2 electrode in Dye-sensitized Solar Cells (형광물질을 이용한 염료감응태양전지의 효율향상)

  • Cheon, JongHun;Lee, JeongGwan;Jung, MiRan;Kim, JaeHong
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.88.2-88.2
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    • 2010
  • Dye-sensitized solar cells (DSSCs) have attracted considerable attention on account of their high solar energy-to-conversion efficiencies and low cost processes compared to conventional p-n junction solar cells. The mechanism of DSSC is based on the injection of electrons from the photo excited dyes into the conduction band of the semiconductor electrode. The oxidized dye is reduced by the hole injection into either the hole conductor or the electrolyte. Thus, the light harvesting effect of dye plays an important role in capturing the photons and generating the electron/hole pair, as well as transferring them to the interface of the semiconductor and the electrolyte, respectively. We used the organic fluorescence materials which can absorb short wavelength light and emit longer wavelength region where dye sensitize effectively. In this work, the DSSCs were fabricated with fluorescence materials added $TiO_2$ photo-electrode which were sensitized with metal-free organic dyes. The photovoltaic performances of fluorescence aided DSSCs were compared, and the recombination dark current curves and the incident photon-to-current (IPCE) efficiencies were measured in order to characterize the effects of the additional light harvesting effect in DSSC. Electro-optical measurements were also used to optimize the fluorescence material contents on TiO2 photo-electrode surface for higher conversion efficiency (${\eta}$), fill factor (FF), open-circuit voltage (VOC) and short-circuit current (ISC). The enhanced light harvesting effect by the judicious choice/design of the fluorescence materials and sensitizing dyes permits the enhancement of photovoltaic performance of DSSC.

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Design and Implementation of Dermatology $CO_2$ Laser System (피부과용 $CO_2$레이저시스템의 설계 및 구현)

  • Kim, Whi-Young
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.2
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    • pp.8-13
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    • 2001
  • We demonstrate a pulsed CO$_2$laser with long pulse duration of millisecond order in the low pressure less than 30 Torr. A new power supply for our laser system switches the voltage of AC power line(60㎐) directly. The power supply doesn't need elements such as a rectified bridge, energy-storage capacitors. and a current-limiting resistor in the discharge circuit. In order to control the laser output power, the pulse repetition rate is adjusted up to 60㎐ and the firing angle of SCR gate is varied from 30˚ to 150˚. A ZCS(Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control the gate signal of SCR precisely. The maximum laser output is 23W at the total pressure of 18 Torr, the pulse repetition rate of 60㎐, and SCR gate firing angle of 90˚. In addition, the obtained laser pulse width is approximately 3㎳(FWHM)