• Title/Summary/Keyword: low power mode

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Vibration control of a stay cable with a rotary electromagnetic inertial mass damper

  • Wang, Zhi Hao;Xu, Yan Wei;Gao, Hui;Chen, Zheng Qing;Xu, Kai;Zhao, Shun Bo
    • Smart Structures and Systems
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    • v.23 no.6
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    • pp.627-639
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    • 2019
  • Passive control may not provide enough damping for a stay cable since the control devices are often restricted to a low location level. In order to enhance control performance of conventional passive dampers, a new type of damper integrated with a rotary electromagnetic damper providing variable damping force and a flywheel serving as an inertial mass, called the rotary electromagnetic inertial mass damper (REIMD), is presented for suppressing the cable vibrations in this paper. The mechanical model of the REIMD is theoretically derived according to generation mechanisms of the damping force and the inertial force, and further validated by performance tests. General dynamic characteristics of an idealized taut cable with a REIMD installed close to the cable end are theoretically investigated, and parametric analysis are then conducted to investigate the effects of inertial mass and damping coefficient on vibration control performance. Finally, vibration control tests on a scaled cable model with a REIMD are performed to further verify mitigation performance through the first two modal additional damping ratios of the cable. Both the theoretical and experimental results show that control performance of the cable with the REIMD are much better than those of conventional passive viscous dampers, which mainly attributes to the increment of the damper displacement due to the inertial mass induced negative stiffness effects of the REIMD. Moreover, it is concluded that both inertial mass and damping coefficient of an optimum REIMD will decrease with the increase of the mode order of the cable, and oversize inertial mass may lead to negative effect on the control performance.

Design of QDI Model Based Encoder/Decoder Circuits for Low Delay-Power Product Data Transfers in GALS Systems (GALS 시스템에서의 저비용 데이터 전송을 위한 QDI모델 기반 인코더/디코더 회로 설계)

  • Oh Myeong-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.1 s.343
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    • pp.27-36
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    • 2006
  • Conventional delay-insensitive (DI) data encodings usually require 2N+1 wires for transferring N-bit. To reduce complexity and power dissipation of wires in designing a large scaled chip, an encoder and a decoder circuits, where N-bit data transfer can be peformed with only N+l wires, are proposed. These circuits are based on a quasi delay-insensitive (QDI) model and designed by using current-mode multiple valued logic (CMMVL). The effectiveness of the proposed data transfer mechanism is validated by comparisons with conventional data transfer mechanisms using dual-rail and 1-of-4 encodings through simulation at the 0.25 um CMOS technology. In general, simulation results with wire lengths of 4 mm or larger show that the CMMVL scheme significantly reduces delay-power product ($D{\ast}P$) values of the dual-rail encoding with data rate of 5 MHz or more and the 1-of-4 encoding with data rate of 18 MHz or more. In addition, simulation results using the buffer-inserted dual-rail and 1-of-4 encodings for high performance with the wire length of 10 mm and 32-bit data demonstrate that the proposed CMMVL scheme reduces the D*P values of the dual-rail encoding with data rate of 4 MHz or more and 1-of-4 encoding with data rate of 25 MHz or more by up to $57.7\%\;and\;17.9\%,$ respectively.

Implementation and verification of H.264 / AVC Intra Predictor for mobile environment (모바일 환경에서의 H.264 / AVC를 위한 인트라 예측기의 구현 및 검증)

  • Yun, Cheol-Hwan;Jeong, Yong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.12
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    • pp.93-101
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    • 2007
  • Small area and low power implementation are important requirements for various multimedia processing hardware, especially for mobile environment. This paper presents a hardware architecture of H.264/AVC Intra Prediction module aiming on small area and low power. A single arithmetic unit was shared and processed sequentially for all mode decisions and computations to predict an image frame. As a result, we could get smaller area and smaller memory size compared to other existing implementations. The proposed architecture was verified using the Altera Excalibur device, and the implemented hardware has been described in Verilog-HDL and synthesized on Samsung STD130 0.18um CMOS Standard Cell Library using Synopsys Design Compiler. The synthesis result was about 11.9K logic gates and 1078 byte internal SRAM and the maximum operating frequency was 107Mhz. It consumes 879,617 clocks to process one QCIF frame, which means it can process 121.5 QCIF$(176\times144)$ frames per second, therefore it shows that it can be used for real time H.264/AVC encoding of various multimedia applications.

Characteristic analysis of The Catalyst Layer and Gas Diffusion Layer Model for FEMFC optimal design (FEMFC 최적설계를 위한 촉매층모델과 기체확산층 특성해석)

  • Kwon, Kee-Hong
    • Journal of IKEEE
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    • v.21 no.2
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    • pp.123-129
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    • 2017
  • Proton Exchange Membrane Fuel Cell (FEMFC) is a strong candidate for future automobile and power generation because of its high power density, low emission and low operation temperature. The major concerns of the gas diffusion layer (GDL) inside a FEMFC is water management. The GDL is typically comprised of carbon for electrical conductivity and PTFE for Hydrophobicity. In this simulation, GDL flooding was investigated using a simplified approach method of an established equation models(Fick' Law, Darcy, Law, Stefan-Maxwell diffusion). The performance of GDL was shown using result of the inner heat, water density and oxygen density of the cell using model equations. The catalyst layer mode in FEMFC showed results of effectiveness factor, Butler-volmer and hydrogen flux density. These results are interesting because the influence of several factors has been shown and the information will be helpful for fuel cell design.

Development of Variable Speed Digital Control System for SRM using Simple Position Detector (간단한 위치검출기를 이용한 SRM 가변속 디지털 제어시스템 개발)

  • 천동진;정도영;이상호;이봉섭;박영록
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.2
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    • pp.202-208
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    • 2001
  • A Switched Reluctance Motor(SRM) has double salient poles structure and the phase windings are wound in stator. SRM hase more simple structure that of other motor, thus manufacture cost is low, mechanically strong, reliable to a poor environment such as high temperature, and maintenance cost is low because of brushless. SRM needs position detector to get rotator position information for phase excitation and tachometer or encoder for constant speed operation. But, this paper doesn\`s use an encoder of high cost for velocity measurement of rotator. Instead of it, the algorithm for position detection and velocity estimation from simple slotted disk has been proposed and developed. To implement variable speed digital control system with velocity estimation algorithm, the TMS320F240-20MIPS fixed point arithmetic processor of TI corporation is used. The experimental results of the developing system are enable to control speed with wide range, not only single pulse, hard chopping mode and soft chopping, ut also variable speed control, and advance angle control.

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A Programmable Fast, Low Power 8 Bit A/D Converter for Fiber-Optic Pressure Sensors Monitoring Engines (광섬유 엔진 모니터용 압력센서를 위한 프로그램 가능한 고속 저전력 8 비트 아날로그/디지탈 변환기)

  • Chai, Yong-Yoong
    • Journal of Sensor Science and Technology
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    • v.8 no.2
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    • pp.163-170
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    • 1999
  • A programmable A/D converter for an embedded fiber-optic combustion pressure sensor has been designed with 8 N and P channel MOSFETs, respectively. A local field enhancement for reducing programming voltage during writing as well as erasing an EEPROM device is introduced. In order to observe linear programmability of the EEPROM device during programming mode, a cell is developed with a $1.2\;{\mu}m$ double poly CMOS fabrication process in MOSIS. It is observed that the high resolution, of say 10mVolt, is valid in the range 1.25volts to 2volts. The experimental result is used for simulating the programmable 8 bit A/D converter with Hspice. The A/D converter is demonstrated to consume low power, $37\;{\mu}W$ by utilizing a programming operation. In addition, the converter is attained at the conversion frequency of 333 MHz.

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Residual Neuromuscular Sensing Platform Development using Sensor of Nerve Stimulation Response Measurement during Anesthesia (신경자극반응 측정 센서를 이용한 마취 시 잔여근이완 감지 플랫폼 구현)

  • Shin, Hyo-Seob;Kim, Young-Kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.459-462
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    • 2010
  • Response to nerve stimulation platform for implementing measures to detect finger movement has been functioning as an important factor. This stimulated finger on the nerve and muscle responses would vary. In other words, the finger movement of the muscle response to nerve stimulation and sensing Actuator for the H/W development is needed. In addition, a low power embedded CPU based on the top was used. H/W configuration portion of the isolation power, constant current control, High impedance INA, amplifier parts, and the stimulus mode and the Micro-control the status of current, AD converter Low Data obtained through the processing system is implemented.

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MAC Scheduling Algorithm for Efficient Management of Wireless Resources in Bluetooth Systems (블루투스 시스템에서의 효율적 무선자원관리를 위한 MAC 스케쥴링 기법)

  • 주양익;권오석;오종수;김용석;이태진;엄두섭;차균현
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.9A
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    • pp.702-709
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    • 2003
  • In this paper, we propose an efficient and QoS-aware MAC scheduling algorithm for Bluetooth, which considers both throughput and delay performance of each Master-Slave pair in scheduling decisions, and thus, attempts to maximize overall performance. The proposed algorithm, MTDPP (Modified Throughput-Delay Priority Policy), makes up for the drawbacks of T-D PP (Throughput-Delay Priority Policy) proposed in [6] and improves the performance. Since Bluetooth employs a master-driven TDD based scheduling algorithm, which is basically operated with the Round Robin policy, many slots may be wasted by POLL or NULL packets when there is no data waiting for transmission in queues. To overcome this link wastage problem, several algorithms have been proposed. Among them, queue state-based priority policy and low power mode-based algorithm can perform with high throughput and reasonable fairness. However, their performances may depend on traffic characteristics, i.e., static or dynamic, and they require additional computational and signaling overheads. In order to tackle such problems, we propose a new scheduling algorithm. Performance of our proposed algorithm is evaluated with respect to throughput and delay. Simulation results show that overall performances can be improved by selecting suitable parameters of our algorithm.

A Comparison of Muscle Contraction Using Functional Electrical Stimulation: Intermittent High Frequency Alternating Stimulation Versus Intermittent Low Frequency Synchronous Stimulation (기능적 전기자극기를 이용한 간헐적 고주파 교대자극과 간헐적 저주파 동시자극의 근 수축력 비교)

  • Song, Young-Hee;Cho, Sang-Hyun;Lee, Young-Hee
    • Physical Therapy Korea
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    • v.9 no.2
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    • pp.115-131
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    • 2002
  • Functional electrical stimulation (FES) training of the knee extensors is a useful way to rehabilitate the ability to stand and walk. However, training using FES has not been able to solve the problem of fatigue; clinical application of FES quickly produces muscle fatigue, due to the continuous activation of the muscles of the lower extremity. Therefore, reduction of muscle fatigue is an important factor in increasing the effectiveness of FES training in paraplegia. Intermittent high frequency alternating stimulation is a method that combines the advantages of high frequency (leading to strong muscle contractions) and alternating stimulation (reducing muscle fatigue), thereby continuously strengthening muscles. It is not known whether low frequency simultaneous stimulation results in stronger muscle contraction than high frequency alternating stimulation. This study compared the effectiveness of high frequency alternating stimulation with low frequency synchronized stimulation. Muscle power using FES on the quadriceps of 20 normal subjects were compared. Intermittent high frequency alternating stimulation did not produce more powerful muscle contraction than intermittent low frequency synchronized stimulation, because the muscle characteristics differed individually. Significant individual variation according to muscle characteristics was founded when applying FES. Accordingly, when physical therapists use FES to treat patients, they must be aware of individual variation in muscle characteristics.

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Low-Energy Intra-Task Voltage Scheduling using Static Timing Analysis (정적 시간 분석을 이용한 저전력 태스크내 전압 스케줄링)

  • Sin, Dong-Gun;Kim, Ji-Hong;Lee, Seong-Su
    • Journal of KIISE:Computer Systems and Theory
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    • v.28 no.11
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    • pp.561-572
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    • 2001
  • Since energy consumption of CMOS circuits has a quadratic dependency on the supply voltage, lowering the supply voltage is the most effective way of reducing energy consumption. We propose an intra-task voltage scheduling algorithm for low-energy hard real-time applications. Based on a static timing analysis technique, the proposed algorithm controls the supply voltage within an individual task boundary. By fully exploiting all the slack times, as scheduled program by the proposed algorithm always complete its execution near the deadline, thus achieving a high energy reduction ratio. In order to validate the effectiveness of the proposed algorithm, we built a software tool that automatically converts a DVS-unaware program into an equivalent low-energy program. Experimental results show that the low-energy version of an MPEG-4 encoder/decoder (converted by the software tool) consumes less than 7~25% of the original program running on a fixed-voltage system with a power-down mode.

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