• 제목/요약/키워드: low leakage

검색결과 1,336건 처리시간 0.034초

Low-Temperature Growth of $SiO_2$ Films by Plasma-Enhanced Atomic Layer Deposition

  • Lim, Jung-Wook;Yun, Sun-Jin;Lee, Jin-Ho
    • ETRI Journal
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    • 제27권1호
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    • pp.118-121
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    • 2005
  • Silicon dioxide ($SiO_2$) films prepared by plasma-enhanced atomic-layer deposition were successfully grown at temperatures of $100\;to\;250^{\circ}C$, showing self-limiting characteristics. The growth rate decreases with an increasing deposition temperature. The relative dielectric constants of $SiO_2$ films are ranged from 4.5 to 7.7 with the decrease of growth temperature. A $SiO_2$ film grown at $250^{\circ}C$ exhibits a much lower leakage current than that grown at $100^{\circ}C$ due to its high film density and the fact that it contains deeper electron traps.

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W-TiN 금속 게이트를 사용한 금속-산화막-반도체 소자의 특성 분석 (Investigation of the W-TiN gate for Metal-Oxide-Semiconductor Devices)

  • 윤선필;노관종;양성우;노용한;장영철;김기수;이내응
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.318-321
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    • 2000
  • We showed that the change of Ar to $N_2$flow during the TiN deposition by the reactive sputtering decides the crystallinity of LPCVD W, as well as the electrical properties of the W-TiN/SiO$_2$Si capacitor. In particular, the threshold voltage can be controlled by the Ar to $N_2$ratio. As compared to the results obtained from the LPCVD W/SiO$_2$/Si MOS capacitor, the insertion of approximately 50 nm TiN film effectively prohibits the fluorine diffusion during the deposition and annealing of W films, resulting in negligible leakage currents at the low electric fields.

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Investigation of Nb-Zr-O Thin Film using Sol-gel Coating

  • Kim, Joonam;Haga, Ken-ichi;Tokumitsu, Eisuke
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권2호
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    • pp.245-251
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    • 2017
  • Niobium doped zirconium oxide (Nb-Zr-O:NZO) thin films were fabricated on Si substrates by a sol-gel technique with an annealing temperatures of $500{\sim}1000^{\circ}C$ in air ($N_2:O_2=3:1$) for 20 minutes. It was found that the NZO film is based on tetragonal $ZrO_2$ polycrystalline structure with the Nb 5+ ion state and there is almost no diffusion of Nb or Zr to Si substrate. The relative dielectric constant for the NZO film with the Nb composition of 30 mol% and annealed at $800^{\circ}C$ was around 40. The root mean roughness was 1.02 nm. In addition, the leakage current of NZO films was as low as $10^{-6}A/cm^2$ at 4.4 V.

PWB 기판용 Embedded Capacitor필름 제작에 관한 연구 (Study on the Fabrication of Embedded Capacitor Films for PWB substrate)

  • 이주연;조성동;백경욱
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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    • pp.21-27
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    • 2001
  • Epoxy/BaTiO$_3$composite film type capacitors with excellent stability at room temperature, uniform thickness, and electrical properties over a large area were successfully fabricated. We fabricated composite capacitor films with good film formation capability and easy process ability, from ACF-resin as a matrix and two kinds of BaTiO$_3$powders as fillers to increase the dielectric constant of the composite film. The crystal structure of the powders and its effects on dielectric constant of the films were investigated by X-ray diffraction. DSC and dielectric properties tests were conducted to decide the right curing temperature and the optimum amount of the curing agent. As a result, the capacitors of $7{\mu}{\textrm}{m}$ thick film with 10nF/cm2 and low leakage current were successfully demonstrated.

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Memory Design for Artificial Intelligence

  • Cho, Doosan
    • International Journal of Internet, Broadcasting and Communication
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    • 제12권1호
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    • pp.90-94
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    • 2020
  • Artificial intelligence (AI) is software that learns large amounts of data and provides the desired results for certain patterns. In other words, learning a large amount of data is very important, and the role of memory in terms of computing systems is important. Massive data means wider bandwidth, and the design of the memory system that can provide it becomes even more important. Providing wide bandwidth in AI systems is also related to power consumption. AlphaGo, for example, consumes 170 kW of power using 1202 CPUs and 176 GPUs. Since more than 50% of the consumption of memory is usually used by system chips, a lot of investment is being made in memory technology for AI chips. MRAM, PRAM, ReRAM and Hybrid RAM are mainly studied. This study presents various memory technologies that are being studied in artificial intelligence chip design. Especially, MRAM and PRAM are commerciallized for the next generation memory. They have two significant advantages that are ultra low power consumption and nearly zero leakage power. This paper describes a comparative analysis of the four representative new memory technologies.

안전한 캠핑 문화의 정착을 위한 야외용 프로판 연소기 안전기준 실증 연구 (A Verification Test on Safety Standards of Portable Propane Gas Stove for Safe Camping Culture)

  • 안현수;최슬기;이창언;김영구
    • 한국연소학회:학술대회논문집
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    • 한국연소학회 2014년도 제49회 KOSCO SYMPOSIUM 초록집
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    • pp.293-294
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    • 2014
  • In Korea, only butane gas could be used as fuel gas of the outdoor gas stove. However, butane is not vaporized well at low temperatures. For this reason, in the field, nozzle of the portable butane gas stove is converted illegally to use propane gas. Because vapor pressure of propane gas is higher than that of butane gas at same temperature, gas accidents such as gas leakage could be occurred. To prevent gas accidents and use portable propane gas stoves safely, international standards need to be analyzed and verification tests need to be performed with prototype stove. This study could suggest to revise standard for safety improvement with portable propane gas stoves.

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원자층 증착 기술을 이용한 TiO2 활성층 기반 TFT 연구 (Study on the Thin-film Transistors Based on TiO2 Active-channel Using Atomic Layer Deposition Technique)

  • 김성진
    • 한국전기전자재료학회논문지
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    • 제28권7호
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    • pp.415-418
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    • 2015
  • In this paper, $TiO_2$ based thin-film transistors (TFTs) were fabricated using by an atomic layer deposition with high aspect ratio and excellent step coverage. $TiO_2$ semiconducting layer was deposited showing a rutile phase through the rapid thermal annealing process, and exhibited TFT characteristics with a $200{\mu}m$ channel length of low-leakage currents (none of current flow during off-state), stable threshold voltages (-10 V ~ 0 V), and a much higher on/off current ratio (<$10^5$), respectively.

태양광 인버터 회로구조에 따른 누설전류 비교 (Comparison of Leakage Current in Various Photovoltaic Inverter Topologies)

  • 윤한종;조영훈;최규하
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.105-106
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    • 2016
  • In low-power grid-connected photovoltaic(PV) system, Single-phase transformerless full-bridge inverter is commonly used. However in transformerless photovoltaic application, the ground parasitic capacitance created by grounding between PV panels and ground. This ground parasitic capacitance inject additional current into the inverter, these currents cause electromagnetic interference problem, safety problem and harmonics problem in PV applications. In order to eliminate the ground current, This paper propose various inverter topologies in PV applications. These proposed inverter topologies are verified through simulation using PSIM.

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영전압 스위칭방식의 고효율 직류전동기 구동회로 (Zero-Voltage Switching High Efficient DC Motor Drive)

  • 윤석호;문건우;추진부;김용
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.2091-2094
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    • 1997
  • A half-bridge ZVS-PWM converter with complementary switch is described in this paper. Zero Voltage Switching is analyzed taking into account the effect of the leakage inductor of transformer. The main advantages of this converter, that are high efficiency for low output voltage, soft-switching for primary and very small pulsation for DC motor, are shown in a simulation.

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Czochralski 법으로 성장시킨 실리콘 단결정 Wafer에서의 Gettering에 관한 연구 (A Study on the Gettering in Czochralski-grown Single Crystal Silicon Wafer)

  • 양두영;김창은;한수갑;이희국
    • 한국세라믹학회지
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    • 제29권4호
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    • pp.273-282
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    • 1992
  • The effects of intrinsic and extrinsic gettering on the formation of microdefects in the wafer and on the electrical performance at near-surfaces of three different oxygen-bearing Czochralski silicon single crystal wafers were investigated by varying the combinations of the pre-heat treatments and the phosphorus diffusion through the back-surface of the wafers. The wafers which had less than 10.9 ppma of oxygen formed no gettering zones irrespective of any pre-heat treatments, while the wafers which had more than 14.1 ppma of oxygen and were treated by Low+High pre-heat treatments generated the gettering zone comprising oxygen precipitates, staking faults, and dislocation loops. The effects of extrinsic gettering by phosphorus diffusion were evident in all samples such that the minority carrier lifetimes were increased and junction leakage currents were decreased. However, the total gettering effects among the different pre-heat treatments did not necessarily correspond to the gettering structure revealed by synchrotron radiation section topograph.

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