• 제목/요약/키워드: low leakage

검색결과 1,336건 처리시간 0.031초

CMOS 0.18um 공정을 이용한 2.45GHz Low-IF 직접 변환 방식 혼합기 설계 (A Design of Direct conversion method 2.45GHz Low-IF Mixer Using CMOS 0.18um Process)

  • 최진규;김형석
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2008년도 정보통신설비 학술대회
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    • pp.414-417
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    • 2008
  • This paper presents the design and analysis of 2.45GHz Low-IF Mixer using CMOS 0.18um. The Mixer is implemented by using the Gilbert-type configuration, current bleeding technique, and the resonating technique for the tail capacitance. And the design of this Double Balance Mixer is based on its lineaity since it is important in the interference cancellation system. The low flicker noise mixer is implemented by incorporating a double balanced Gilber-type configuration, the RF leakage-less current bleeding technique, and Cp resonating technique. The proposed mixer has a simulated conversion gain of 16dB a simulated IIP3 of -3.3dBm and P1dB is -19dBm. A simulated noise figure of 6.9dB at l0MHz and a flicker corner frequency of 510kHz while consuming only 10.65mW od DC power. The layout of Mixer for one-chip design in a 0.18-um TSMC process has 0.474mm$\times$0.39 mm size.

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TTS로 성막한 Al 캐소드를 가진 유기발광소자의 특성 분석 (Characteristics of organic light-emitting diodes with AI cathode prepared by ITS system)

  • 문종민;이상현;김한기
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.74-75
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    • 2007
  • We report on the characteristics of organic light-emitting diodes with Al cathode deposited by specially designed twin target sputter(TTS) system. It was found that the Al cathode films grown by TTS system were amorphous structure with nanocrystallines due to low substrate temperature during sputtering process. Effective confinement of high-density plasma between two Al targets lead to low temperature sputtering process on organic layer. Moreover, organic light-emitting diodes with Al cathode deposited by TTS system exhibited low leakage current density of $4{\times}10^{-6}\;mA/cm2$ at -6 V indicating plasma damage due to bombardment of energetic particles such as ions and $\gamma$-electrons was effectively restricted in the ITS system. Sputtering method using ITS system is expected to be applied in organic electronics and flexible displays due to its low temperature and plasma damage free deposition process.

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저온저항성 유전자가 도입된 국화 형질전환체 특성 (The characterization of transgenic Chrysanthemum under low temperature condition)

  • 최인영;한수곤;강찬호;송영주;이왕휴
    • Journal of Plant Biotechnology
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    • 제35권1호
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    • pp.55-61
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    • 2008
  • PCR 및 Real-Time PCR 검정으로 확인된 국화 형질전환체는 저온저항성 BN115 gene과 표지유전자로 kanamycin에 저항성 있는 nptII gene을 가지고 있는 식물발현용 binary vector pBin19/BN115가 삽입된 A. tumefacience MP90을 국화잎에 공동 배양함으로 유전자가 도입되었다. 최종 선발된 형질전환체의 온도별 생육은 형질전환체가 비형질전환체에 비해 초장, 생체중, 엽수 모두 우수하였다. 또한 저온에서의 상해정도 관찰에서도 수침상정도가 비형질전환체보다 경미하였다. 저온의 외부환경에 따른 국화잎의 기공모양은 닫고 있는 비형질전환체와 달리 형질전환체는 개구된 모양을 유지하고 있었으며, 크기는 형질전환체의 크기가 비형질전환체보다 더 큰 것으로 측정되었다. 저온조건에서의 형질전환체 엽록소 함량은 5, $25^{\circ}C$에서는 비형질전환체와 비교하여 SPAD value 값에 큰 차이가 없었지만, 10, $15^{\circ}C$에서는 최대 +5.7 (평균+3.0), +9.7 (평균 +5.7)로 상대적으로 높은 함량을 나타냈다 또한 Ion leakage test결과 저온저항성 유전자가 도입된 형질전환체의 세포가 외부환경에 안정적으로 적응하여 세포내 파괴나 상해를 받지 않음으로 형질전환체의 EC 농도 (ds/m)가 비형질전환체에 비해 $1.29{\sim}1.97$배 낮은 수치를 보였다.

연구용 저속 축류압축기의 내부 유동 특성에 관한 실험적 연구 (Experimental Study on the Flow Characteristics in a Low Speed Research Compressor)

  • 박태춘;한정엽;강신형
    • 한국유체기계학회 논문집
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    • 제11권6호
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    • pp.54-63
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    • 2008
  • A study on the flow characteristics in a 4-stage axial compressor and the behavior of rotating stall was experimentally performed at the third-stage rotor and stator rows in order to investigate its performance and instability of the compression system. The pressure losses generated due to the leakage flow at a tip clearance and a shroud seal clearance and the wake flow near the trailing edge of a blade were taken into consideration to estimate the causes of performance drop of the low speed research compressor(LSRC) in Seoul national university. In addition, the measurement of rotating stall was conducted with hot-wire probes and the existence and propagation of stall cell could be confirmed through fast Fourier transform and cross-correlation analysis.

Characterization of Ultra Low-k SiOC(H) Film Deposited by Plasma-Enhanced Chemical Vapor Deposition (PECVD)

  • Kim, Sang-Yong
    • Transactions on Electrical and Electronic Materials
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    • 제13권2호
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    • pp.69-72
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    • 2012
  • In this study, deposition of low-dielectric constant SiOC(H) films by conventional plasma-enhanced chemical vapor deposition (PECVD) were investigated through various characterization techniques. The results show that, with an increase in the plasma power density, the relative dielectric constant (k) of the deposited films decreases whereas the refractive index increases. This is mainly due to the incorporation of organic molecules with $CH_3$ group into the Si-O-Si cage structure. It is as confirmed by FT-IR measurements in which the absorption peak at 1,129 $cm^{-1}$ corresponding to Si-O-Si cage structure increases with power plasma density. Electrical characterization reveals that even after fast thermal annealing process, the leakage current density of the deposited films is in the order of $10^{-11}$ A/cm at 1.5 MV/cm. The reliability of the SiOC(H) film is also further characterized by using BTS test.

RTP Anneal과 추가 이온주입에 의한 저-저항 텅스텐 bit-line 구현 (Low-Resistance W Bit-line Implementation with RTP Anneal & Additional Ion Implantation.)

  • 이용희;우경환;최영규;류기한;이천희
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.266-269
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    • 2000
  • As the device geometry continuously shrink down less than sub-quarter micrometer, DRAM makers are going to replace conventional tungsten-polycide with tungsten bit-line structure in order to reduce the chip size and use it as a local interconnection. In this paper we showed low resistance and leakage tungsten bit-line process with various RTP(Rapid Thermal Process) temperature. As a result we obtained that major parameters impact on tungsten bit-line process are RTP Anneal temperature and BF2 ion implantation dopant. These tungsten bit-line process are promising to fabricate high density chip technology.

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Strained-Silicon-on-Insulator (sSOI) 기판을 이용한 Capacitorless 1-Transistor DRAM 소자 (A Capacitorless 1-Transistor DRAM Device using Strained-Silicon-on-Insulator (sSOI) Substrate)

  • 김민수;오준석;정종완;이영희;정홍배;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.95-96
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    • 2009
  • A fully depleted capacitorless 1-transistor dynamic random access memory (FD 1T-DRAM) based on a sSOI strained-silicon-on-insulator) wafer was investigated. The fabricated device showed excellent electrical characteristics of transistor such as low leakage current, low subthreshold swing, large on/off current ratio, and high electron mobility. The FD sSOI 1T-DRAM can be operated as memory device by the floating body effect when the substrate bias of -15 V is applied, and the FD sSOI 1T-DRAM showed large sensing margin and several milli seconds data retention time.

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$La_2O_3$가 첨가된 Pr계 ZnO 바리스터의 미세구조와 전기적 특성 (The Microstructure and Electrical Characteristics of Pr-Based ZnO Variators with $La_2O_3$Additives)

  • 남춘우;박춘현
    • 한국전기전자재료학회논문지
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    • 제11권11호
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    • pp.969-974
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    • 1998
  • The effects of $La_2O_3$on the microstructure and electrical characteristics of Pr-based ZnO varistors were investigated. The average grain size increased in the range of 21.9~56.3$\mu$ m with increasing $La_2O_3$additive content(0.0~2.0 mol%). La was, of course grain boundary, largely segregated at the nodal point. As $La_2O_3$additive content increases, threshold voltage and nonlinear coefficient decreased and leakage current increased. In particular, 2.0 mol% $La_2O_3$-added varistor exhibited low threshold voltage 17.0V/mm and nonlinear coefficient of about 6. Based on these results, this varistor can be said to be used as low-voltage varistor, if nonlinear coefficient is somewhat improved forward.

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3.5-Inch QCIF AMOLED Panels with Ultra-low-Temperature Polycrystalline Silicon Thin Film Transistor on Plastic Substrate

  • Kim, Yong-Hae;Chung, Choong-Heui;Moon, Jae-Hyun;Lee, Su-Jae;Kim, Gi-Heon;Song, Yoon-Ho
    • ETRI Journal
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    • 제30권2호
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    • pp.308-314
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    • 2008
  • In this paper, we describe the fabrication of 3.5-inch QCIF active matrix organic light emitting display (AMOLED) panels driven by thin film transistors, which are produced by an ultra-low-temperature polycrystalline silicon process on plastic substrates. The over all processing scheme and technical details are discussed from the viewpoint of mechanical stability and display performance. New ideas, such as a new triple-layered metal gate structure to lower leakage current and organic layers for electrical passivation and stress reduction are highlighted. The operation of a 3.5-inch QCIF AMOLED is also demonstrated.

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LTCC기술을 이용한 마이크로 인덕터에 관한 연구 (A study on the micro inductor using LTCC technology)

  • 최동찬;김찬영;김희준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.289-291
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    • 2003
  • This paper deals with the design of a spiral micro inductor using LTCC(Low Temperature Cofired Ceramics) technology. The inductors using the LTCC technology have some prominent properties of high integration of circuits, high confidence and low cost comparing with previously fabricated thick-film inductors. In this paper, we designed a new spiral-type micro inductor comprising a magnetic material to improve the inductance and leakage flux. we, in addition, presented the simulation results for various shapes of the magnetic material in the micro inductor, Finally application of the micro inductor to the boost DC-DC converter is investigated.

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