• ETRI Journal
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• v.40 no.6
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• pp.693-698
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• 2018

This paper presents a true-time delay (TTD) using a commercial $0.13-{\mu}m$ CMOS process for wideband phased-array antennas without the beam squint. The proposed TTD consists of four wideband distributed gain amplifiers (WDGAs), a 7-bit TTD circuit, and a 6-bit digital step attenuator (DSA) circuit. The T-type attenuator with a low-pass filter and the WDGAs are implemented for a low insertion loss error between the reference and time-delay states, and has a flat gain performance. The overall gain and return losses are >7 dB and >10 dB, respectively, at 2 GHz-18 GHz. The maximum time delay of 198 ps with a 1.56-ps step and the maximum attenuation of 31.5 dB with a 0.5-dB step are achieved at 2 GHz-18 GHz. The RMS time-delay and amplitude errors are <3 ps and <1 dB, respectively, at 2 GHz-18 GHz. An output P1 dB of <-0.5 dBm is achieved at 2 GHz-18 GHz. The chip size is $3.3{\times}1.6mm^2$, including pads, and the DC power consumption is 370 mW for a 3.3-V supply voltage.

• Journal of Korea Multimedia Society
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• v.10 no.8
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• pp.1039-1051
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• 2007

In this paper, a new lip synchronization control method is proposed to achieve very low delay in the video communication. The lip control is so much vital in video communication as delay reduction. In a general way, to control the lip synchronization, both the playtime and capture time calculated from RTP time stamp are used. RTP timestamp is created by stream sender and sent to the receiver along the stream. It is extracted from the received packet by stream receiver to calculate playtime and capture time. In this paper, we propose the method of searching most adjacent corresponding frame of the audio signal, which is assumed to be played with uniform speed. Encoding buffer of stream sender is removed to reduce the buffering delay. Besides, decoder buffer of receiver, which is used to correct the cracked packet, is resulted to process only 3 frames. These mechanisms enable us to achieve ultra low delay less than 100 ms, which is essential to video communication. Through simulations, the proposed method shows below the 100 ms delay and controlled the lip synchronization between audio and video.

• The Journal of the Acoustical Society of Korea
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• v.37 no.2
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• pp.110-117
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• 2018

In this paper, we propose a low delay window switching MDCT (Modified Discrete Cosine Transform) method for speech/audio coder. The window switching algorithm is used to reduce the degradation of sound quality in non-stationary trasient duration and to reduce the algorithm delay by using the low delay TDAC (Time Domain Aliasing Cancellation). While the conventional window switching algorithms uses overlap-add with different lengths, the proposed method uses the fixed overlap add length. It results the reduction of algorithm delay by half and 1 bit reduction in frame indication information by using 2 window types. We apply the proposed algorithm to G.729.1 based on MDCT in order to evaluate the performance. The propose method shows the reduction of algorithm delay by half while speech quality of the proposed method maintains same as the conventional method.

• Physical Therapy Korea
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• v.4 no.1
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• pp.48-62
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• 1997

Several studies have evaluated the effects of types of relative frequency and delay interval of knowledge of results(KR) on motor skill learning independently. The purpose of this study was to determine more effective types of KR relative frequency and KR delay interval for motor learning. Forty-six healthy subjects (15 female, 31 male) with no previous experience with this experiment participated. The subjects ranged in age from 20 to 29 years (mean=23.9, SD=0.474). All subjects were assigned to one of four groups: a high-instant group, a high-delay group, a low-instant group, and a low-delay group. During the acquisition phase, subjects practiced movements to a target (400 mm) with either a high (83%) or low (33%) KR relative frequency, and with either an instantaneous or delayed (after 8s) KR. Four groups were evaluated on retention (after 3min and 24hr) and transfer (450 mm) tests. The major findings were as follows: (1) there were no between-group differences in acquisition and short-term retention (p>0.05, (2) a low (33%) KR relative frequency during practice was as effective for learning as measured by both long-tenn retention and transfer tests, compared with high (83%) KR practice conditions (p<0.05), (3) delayed (8s) KR enhanced learning as measured by both long-term retention and transfer tests, compared with instantaneous KR practice conditions (p<0.05), and (4) there were no interactions between KR relative frequency and KR delay interval during acquisition, retention, and transfer phases. The results suggest that relatively less frequent and delayed KR are more effective types for motor learning than more frequent and instantaneous KR.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.16 no.11 s.116
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• pp.1100-1107
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• 2006

As environmental vibration requirements on precision equipment become more stringent, use of pneumatic isolators has become more popular and their performance is subsequently required to be further improved. Performance of passive pneumatic isolators is related to various design parameters in a complicated manner and, hence, is very limited especially in low frequency range by chamber volume. In this study, transmissibility behavior of the pneumatic isolators depending on frequency and dynamic amplitude are presented. Then, an active control technique, time delay control, which is adequate for a low frequency nonlinear system, is applied. A procedure of applying the time delay control law to a pneumatic isolator is presented and it's effectiveness in the transmissibility performance is shown. Comparison between passive and active pneumatic isolators is made based on simulation.

• Wind and Structures
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• v.15 no.3
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• pp.263-283
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• 2012

This paper presents a framework of nonlinear dynamic analysis of a low-speed moving maglev (magnetically levitated) vehicle subjected to cross winds and controlled using a clipped-LQR actuator with time delay compensation. A four degrees-of-freedom (4-DOFs) maglev-vehicle equipped with an onboard PID (Proportional-Integral-Derivative) controller traveling over guideway girders was developed to regulate the electric current and control voltage. With this maglev-vehicle/guideway model, dynamic interaction analysis of a low-speed maglev vehicle with guideway girders was conducted using an iterative approach. Considering the time-delay issue of unsynchronized tuning forces in control process, a clipped-LQR actuator with time-delay compensation is developed to improve control effectiveness of lateral vibration of the running maglev vehicle in cross winds. Numerical simulations demonstrate that although the lateral response of the maglev vehicle moving in cross winds would be amplified significantly, the present clipped-LQR controller exhibits its control performance in suppressing the lateral vibration of the vehicle.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3184-3186
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• 1999

In this paper, a new structure of fully differential delay cell VCO using quadrature phase for low phase noise and high speed operation is suggested. It is realized by inserting voltage clamp circuit into input pairs of delay cells that include three-control current source having high output impedance. In this reason. this newly designed delay cell for VCO has the low power supply sensitivity so that the phase noise can be reduced. The whole characteristics of VCO were simulated by using HSPICE and SABER. Simulation results show that the phase noise of new VCO is quite small compared with conventional fully differential delay cell VCO and ring oscillator type VCO. It is also very beneficial to low power supply design because of wide tuning range.

• IEIE Transactions on Smart Processing and Computing
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• v.1 no.3
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• pp.152-160
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• 2012

This paper proposes a frame-level rate control algorithm for low delay video applications to reduce the fluctuations in the bitrate. The proposed algorithm minimizes the bitrate fluctuations in two ways with minimal coding loss. First, the proposed rate control applies R-Q model to all frames including the first frame of every group of pictures (GOP) except for the first one of a sequence. Conventional rate control algorithms do not use any R-Q models for the first frame of each GOP and do not estimate the generated-bit. An unexpected output rate result from the first frame affects the remainder of the pictures in the rate control. Second, a rate-distortion (R-D) cost is calculated regardless of the hierarchical coding structure for low bitrate fluctuations because the hierarchical coding structure controls the output bitrate in rate distortion optimization (RDO) process. The experimental results show that the average variance of per-frame bits with the proposed algorithm can reduce by approximately 33.8% with a delta peak signal-to-noise ratio (PSNR) degradation of 1.4dB for a "low-delay B" coding structure and by approximately 35.7% with a delta-PSNR degradation of 1.3dB for a "low-delay P" coding structure, compared to HM 8.0 rate control.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.8
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• pp.1062-1070
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• 2018

This paper presents a simple identification method for discrete-time low-order model of unknown delay process from pulse response. The key idea is to find the parameters of the model such that the first N moments of the unknown process and the model are equal. We first show that the k-th moment of a process can be determined by the moments of the input and output. The parameters and delay are estimated separately. It is shown that for a given delay, the parameters of the low-order model can be determined by solving linear equations in a matrix form. Delay of the model is estimated such that the integral of the absolute errors (IAE) of the candidate models with possible delays minimizes. The illustrative example shows that the proposed method can directly identify low-order models without order reduction process from a single pulse response.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.95-99
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• 2000

New locking algorithm of DLL is proposed to improve the locking speed and low power dissipation in this paper, In spite of using the architecture of delay controller, low power consumption is acquired by operating only one controller at once and fast locking speed is accomplished by initial setting from the coarse controller. The proposed DLL circuit is operated from 50MHz to 200MHz and locked within 6 cycle at all of operating frequency.