• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.4
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• pp.653-660
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• 2001

In this paper, we designed 2303.15MHz frequency synthesizer for the purpose of the phase noise prediction. For the modeling of phase noise generated in the designed system through introducing the noise-modeling method suggested by Lascari we analyzed a variation of phase noise as according as that of offset frequency. Especially, for the third-order system of the PLL among some kinds of phase noise generated from VCO we analyzed the aspect of 1/f-noise appearing troubles in the low frequency band. Since it is difficult to analyze mathematically 1/f-noise in the third-order system of the PLL, introducing the concept of pseudo-damping factor has made an ease of the access of the 1/f-noise variance. we showed a numerical formula of 1/f-noise variance in the third-order system of the PLL which is compared with that of 1/f-noise variance in the second-order system of the PLL. As a result, In case of txco we found the reduce rapidly along the offset frequency after passed through that phase-noise was -160dBc/Hz before passed through a loop at 10kHz offset frequency and -162.6705dBc/kHz after passed through the loop, -180dBc/Hz at 100kHz offset frequency and -560dBc/kHz after passed through the loop. We can notice that the variance of third-order system more occurs (or the variance of second-order system in connection with noise bandwidth and variance factor of second-order and third-order system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.50-55
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• 2011

In this paper, Intermediate frequency tunable 4th order Switched Capacitor(SC) bandpass Sigma-Delta(${\Sigma}-{\Delta}$) modulator using feedback integrator using feedback integrator coefficients is proposed. The center frequency of the modulator can be easily changed than conventional structure because of a number of integrator coefficients which is decided rate of capacitors in circuit is reduced. In addition additive clocks and additive clock generating circuit are not necessary. The purposed modulator was implemented in $0.18{\mu}m$ CMOS technology. The resolution of the modulator within 200 kHz bandwidth and 80 MHz sampling frequency under fin = 15 MHz, 20 MHz, 25 MHz are over 12 bit.

• Journal of Power Electronics
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• v.9 no.5
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• pp.757-771
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• 2009

This paper proposes a systematic approach to the modeling of the small-signal characteristics of three-phase bridge boost rectifiers under non-sinusoidal conditions. The main obstacle to the conventional synchronous d-q frame modeling approach is that it is unable to identify a steady-state under non-sinusoidal conditions. However, for most applications under non-sinusoidal conditions, the current loops of boost rectifiers are designed to have a bandwidth that is much higher than typical harmonics frequencies in order to achieve good current control for these harmonic components. Therefore a quasi-static method is applied to the proposed modeling approach. The converter small-signal characteristics developed from conventional synchronous frame modeling under different operating points are investigated and a worst case point is then located for the current loop design. Both qualitative and quantitative analyses are presented. It is observed that operating points influence the converter low frequency characteristics but hardly affect the dominant poles. The relationship between power stage parameters, system poles and zeroes is also presented which offers good support for the system design. Both the simulation and experimental results verified the analysis and proposed modeling approach. Finally, the practical case of a parallel active power filter is studied to present the modeling approach and the resultant regulator design procedure. The system performance further verifies the whole analysis.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.32 no.3
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• pp.280-289
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• 2008

This paper presents design of the quantitative feedback control system of the three axes hydraulic road simulator with respect to the dummy wheel for uncertain multiple input-output(MIMO) feedback systems. This simulator has the uncertain parameters such as fluid compressibility, fluid leakage, electrical servo components and nonlinear mechanical connections. This works have reproduced the random input signal to implement the real road vibration's data in the lab. The replaced $m^2$ MISO equivalent control systems satisfied the design specifications of the original $m^*m$ MIMO control system and developed the mathematical method using quantitative feedback theory based on schauder's fixed point theorem. This control system illustrates a tracking performance of the closed-loop controller with low order transfer function G(s) and pre-filter F(s) having the minimum bandwidth for parameters of uncertain plant. The efficacy of the designed controller is verified through the dynamic simulation with combined hydraulic model and Adams simulator model. The Matlab simulation results to connect with Adams simulator model show that the proposed control technique works well under uncertain hydraulic plant system. The designed control system has satisfied robust performance with stability bounds, tracking bounds and disturbance. The Hydraulic road simulator consists of the specimen, hydraulic pump, servo valve, hydraulic actuator and its control equipments

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.1222-1225
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• 2004

This paper presents multibit Sigma-Delta ADC using noise-shaped dynamic element matching(DEM). 5-bit flash ADC for multibit quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. The DEM algorithm is implemented in such a way as to minimize additional delay within the feedback loop of the modulator Using this algorithm, distortion spectra from DAC linearity errors are shaped. Sigma Delta ADC achieves 82dB signal to noise ratio over 615H7z bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is designed to use 0.25um CMOS technology with 2.5V supply voltage and verified by HSPICE simulation.

• ETRI Journal
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• v.29 no.4
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• pp.421-429
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• 2007

This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.12
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• pp.5745-5758
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• 2017

In this paper, we develop a simple but very effective 4 by 4 Multiple-Input Multiple-Output (MIMO) antenna system for mobile phones consisting of different types of antennas to achieve low correlation property at the frequency ranges of 1710 to 2170 MHz, which covers wide LTE service bands, from band 1 to band 4. The proposed antenna system consists of two pair of antennas. Each pair consists of a planar inverted-F antenna (PIFA) and a coupling antenna which has the property of the loop. The use of two different antenna types of IFA and a coupling achieves high isolation. Proposed antenna system occupies relatively small area and positions at the four corners of a printed circuit board. The gap between the two antennas is 4 mm, in order to realize the good isolation performance. To evaluate the performance of our proposed antenna system, we perform various experiments. The proposed antenna shows a wide operating bandwidth greater than 460 MHz with isolation between the feeding ports higher than 17.5-dB. It also shows that the proposed antenna has low Envelop Correlation Coefficient (ECC) values smaller than 0.08 over the all desired frequency tuning ranges.

• ETRI Journal
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• v.34 no.5
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• pp.666-673
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• 2012

Non-real-time delivery of stereoscopic video has been considered as a service scenario for 3DTV to overcome the limited bandwidth in the terrestrial digital television system. A hybrid codec combining MPEG-2 and H.264/AVC has been suggested for the compression of stereoscopic video for 3DTV. In this paper, we propose a stereoscopic video coding scheme using adaptive pre-/post-filters (APPF) to improve the quality of 3D video while retaining compatibility with legacy video coding standards. The APPF are applied adaptively to blocks of various sizes determined by the macroblock coding mode and reference frame index. Experiment results show that the proposed method achieves up to 24.86% bit rate savings relative to a hybrid codec of MPEG-2 and H.264/AVC including the inter-view prediction.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.281-286
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• 2007

In this paper, sub-circuits for 24 GHz phase locked 100ps(PLLs) using $0.5{\mu}m$ SiGe HBT are presented. They are 24 Ghz voltage controlled oscillator(VCO), 24 GHz to 12 GHz regenerative frequency divider(RFD) and 12 GHz to 1.5 GHz static frequency divider. $0.5{\mu}m$ SiGe HBT technology, which offers transistors with 90 GHz fMAX and 3 aluminum metal layers, is employed. The 24 GHz VCO employed series feedback topology for high frequency operation and showed -1.8 to -3.8 dBm output power within tuning range from 23.2 GHz to 26 GHz. The 24 GHz to 12 GHz RFD, based on Gilbert cell mixer, showed 1.2 GHz bandwidth around 24 GHz under 2 dBm input and consumes 44 mA from 3 V power supply including I/O buffers for measurement. ECL based static divider operated up to 12.5 GHz while generating divide by 8 output frequency. The static divider drains 22 mA from 3 V power supply.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1813-1815
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• 1996

With the three dimensional magnetic field measuring system dealt with in this paper, accurate measurements and analyses of ELF magnetic fields in the vicinity of UHV overhead transmission lines and substations have been conducted. For the field measurements multiturn loop-type sensors have been developed with special consideration of taking lower frequency and spatial components without any distortion. So the measuring system has the frequency bandwidth of 8[Hz] to about 53[kHz] and the response sensitivity of $9.88[mV/{\mu}T]$ in average. A brief description of design rules of the measuring system and measurement procedures is given. The actual surrey near 154 and 345[kV] overhead transmission lines and power subststions was carried out and analyzed. It may be inferred from these results that the maximum magnetic field intensities under typical UHV overhead transmission lines do not exceed $20[{\mu}T]$ so that the field measurements satisfy sufficiently all limits or guidelines that various authorized international institutes recommend.