• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.3
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• pp.105-110
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• 2005

Programmable Logic Controller(PLC) is the most widely utilized among many sorts of existing controller for the design of factory automation control system, and study about a PLC language is peformed actively. In this paper, we proposed the encoding module that we increase input points when increased of the input machine which is going to control it in the FA design that used PLC. Input point is going to be extended with 2-3 points in the state that cannot equip input unit in basic base any more. Then an extension base, a power supply, an extension cable and an output nit must be equipped particularly. Then a cost must be added very much. This paper proposed the encoding module which extended an input in a small quantity, and we confirmed a feasibility through a simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.107-112
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• 2010

When we design the control system used Programmable Logic controller(PLC), if we program a Sequential Function Chart(SFC), It is easy to understand the sequential flow of control, to maintenance the controller and to describe a program. SFC language is programmed by a single sequence, a select sequence and a parallel sequence. In a select sequence, when the select step is error, the whole process is stopped. If the error step has no connection the whole process, the loss is down when we debugging the program without stopping the whole process. Therefore, this thesis shows the efficient method of remote control for select sequence and we confirmed its feasibility through actual example.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.3 no.2
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• pp.194-199
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• 2003

Data are an expression of the language or numerical values that show some features. And the information is extracted from data for the specific purposes. The knowledge is utilized as information to construct rules that recognize patterns or make a decision. Today, knowledge extraction and application of that are broadly accomplished for the easy comprehension and the performance improvement of systems in the several industrial fields. The knowledge extraction can be achieved by some steps that include the knowledge acquisition, expression, and implementation. Such extracted knowledge is drawn by rules with data mining techniques. Clustering (CL), input space partition (ISP), neuro-fuzzy (NF), neural network (NN), extension matrix (EM), etc. are employed for the knowledge expression based upon rules. In this paper, the various approaches of the knowledge extraction are surveyed and categorized by methodologies and applied industrial fields. Also, the trend and examples of each approaches are shown in the tables and graphes using the categories such as CL, ISP, NF, NN, EM, and so on.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.2
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• pp.126-132
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• 2005

In this paper, an auto-design system is introduced for a stamping tool based on commercial computer aided design system with its drafting language. The auto-design system consists of tool oriented product design subsystem which modifies and configures the product drawing, tool concept design subsystem which make a design of the punches and their punching progression and parts design subsystem that makes automatic dimension. The system is applied to the mechanical design of the stamping tool. The main logic of the system is based on half-edge theory, a kernel for the 3 dimensional CAD system, which is applied to 2 dimensional drafting auto-design system. The auto-design system enables to conspicuously reducing the designing time of the tool. In addition, there is little drafting error that had been about 3% without auto design program. It is effective to reduce the development time for new products because of rapid designing time of the tools, standardization of the stamping tool and the drafting rule for the auto-design system. The auto-design system yields high efficiency of the tool manufacturing system.

• Journal of Internet Computing and Services
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• v.9 no.2
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• pp.89-105
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• 2008

So far, most of research on automated test data generation(ATDG) deals with programs without pointers. Recently, few works hove been done on ATDG in the presence of pointers, but they ore path-oriented techniques which require the specification of on entire program path to be tested or a program to be executed. This paper presents a new technique for generating test data even without specifying a program path completely. The presented technique is a static technique which transforms the test data generation problem into a SAT(SATisfiability) problem and makes advantage of SAT solvers for ATDG. For the ends, we transform a program under test into Alloy which is the first-order relational logic and then produce test data via Alloy analyzer.

• Journal of Electrical Engineering and Technology
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• v.1 no.4
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• pp.513-519
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• 2006

As a very important part in development of the protocol, verifications for developed protocol specification are complementary techniques that are used to increase the level of confidence in the system functions by their specifications. Using the informal method for specifying the protocol, some ambiguity may be contained therein. This indwelling ambiguity in control systems can cause the occurrence of accidents, especially in the case of safety-critical systems. To clear the vagueness contained in the designed protocol, we use the LTS (Labeled Transition System) model to design the protocol for railway signaling. And then, we verify the safety and the liveness properties formally through the model checking method. The modal ${\mu}$-calculus, which is an expressive method of temporal logic, has been applied to the model checking method. We verify the safety and liveness properties of Korean standard protocol for railway signaling systems. To perform automatic verification of the safety and liveness properties of the designed protocol, a communication verification tool is implemented. The developed tools are implemented by C++ language under Windows XP. It is expected to increase the safety and reliability of communication protocol for signaling systems by using the developed communication verification tool.

• Journal of the Korean Society for information Management
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• v.1 no.1
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• pp.25-42
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• 1984

The intellectual organization of information for storage and retrieval is one of the problem areas of information science. But the most of the methods have been developed are based on the coordination of keywords by Boolean logic or traditional classification systems. It is necessary to include in indexing process not just concepts or keywords, but also to express explicitly the relationship between them. Farradane believed that such a system should be founded on the psychology of thinking and developed an outline structure for concept organization and a series of explicit relations. The system of relational operators provides nine symbols which enable the semantic relationship between any two concepts to be explicitly specified in a analet. With the addition of the permutations of such analets, formed according to simple rules, alphabetical arrangement of the first term provides a complete logical subject index. Relational indexing as the basis of an indexing language has the potential to offer improved retrieval performance.

• Journal of KIISE:Software and Applications
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• v.29 no.5
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• pp.345-354
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• 2002

There have been many researches about monitoring and checking the implementations during run-time using formal requirement specification. They usually adopt temporal logics or their extensions to specify the requirements for the implementations. However, most of the systems fail to support the specification of requirements fir dynamic systems - systems whore components are created and removed during run-time. Unlike analysis or design models, most actual implementations are dynamic, so the notion of instances should be employed in the property specification language. In this paper, we show how we can monitor and check Java programs using our temporal logic for dynamic systems (HDTL). We suggest a framework in which the execution of Java programs are monitored and chocked against given HDTL requirements.

• Journal of Information Science Theory and Practice
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• v.3 no.1
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• pp.6-23
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• 2015

This study develops an effective method for sentiment analysis of user-generated content on drug review websites, which has not been investigated extensively compared to other general domains, such as product reviews. A clause-level sentiment analysis algorithm is developed since each sentence can contain multiple clauses discussing multiple aspects of a drug. The method adopts a pure linguistic approach of computing the sentiment orientation (positive, negative, or neutral) of a clause from the prior sentiment scores assigned to words, taking into consideration the grammatical relations and semantic annotation (such as disorder terms) of words in the clause. Experiment results with 2,700 clauses show the effectiveness of the proposed approach, and it performed significantly better than the baseline approaches using a machine learning approach. Various challenging issues were identified and discussed through error analysis. The application of the proposed sentiment analysis approach will be useful not only for patients, but also for drug makers and clinicians to obtain valuable summaries of public opinion. Since sentiment analysis is domain specific, domain knowledge in drug reviews is incorporated into the sentiment analysis algorithm to provide more accurate analysis. In particular, MetaMap is used to map various health and medical terms (such as disease and drug names) to semantic types in the Unified Medical Language System (UMLS) Semantic Network.

• The Transactions of the Korea Information Processing Society
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• v.5 no.8
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• pp.2179-2189
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• 1998

This paper presents the methodolog~- to improve the computatIon efficiency of the simulation by developing the concept of the dynamic preservatIon and reurilization of the state transitions. The computation COst is emormous for the simulation of hardware described in hardware description languages including VHDL Analyzing the process of simulation precisely, we have found that the number of the pattems for the state transition is limited if the sizes of hardware modules are determined properly. The pattems are preserved dynamically when they appeared first, and are utilized in later simulation in order to reduce the simulation costs. In this study, the efficiency of the present method was verified using case studies for the simulation.