• 전기전자학회논문지
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• 제24권4호
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• pp.1162-1166
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• 2020

본 논문에서는 피드백 감지 회로 구조로 인하여 향상된 load regulation 특성을 개선시킨 LDO를 제안하였다. LDO 레귤레이터 내부 오차증폭기의 출력단과 패스 트랜지스터의 입력단 사이에 제안된 feedback 감지 회로를 추가하여 출력에 들어오는 델타 값의 regulation을 개선시켜 기존의 LDO 레귤레이터보다 개선된 load Regulation 특성의 전압 값을 갖는다. 제안된 회로는 Cadence의 Spectre, Virtuoso 시뮬레이션을 이용하여 삼성 0.13um 공정에서 특성을 시뮬레이션 하였다.

• 전기전자학회논문지
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• 제25권3호
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• pp.506-510
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• 2021

본 논문에서는 current detection 구조로 인하여 load regulation의 변화를 향상시킨 LDO를 제안하였다. 제안된 LDO 레귤레이터는 출력단에 제안된 current detection 회로를 추가하였다. 그로인하여 출력에 부하전류에 따른 전압 값의 regulation을 향상시켜 기존 LDO 레귤레이터보다 load Regulation의 변화량을 향상시켰다. 제안한 current detection 구조를 사용하여 부하전류의 변화에 따른 출력 변화를 약 60 % 가량 향상시킬 수 있었다. Cadence의 Virtuoso, Spectre 시뮬레이션을 사용하여 특성을 시뮬레이션 및 검증하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 학술대회 논문집 정보 및 제어부문
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• pp.528-529
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• 2008

Proposed buck converter includes load current sensing circuit to compensate load regulation. Because error amp has finite gain, there is load regulation in SMPS. In this paper we use variable current source that is added to positive input of comparator and current of current source is changed by sensed load current. The simulation result shows that proposed buck converter has improved load regulation than conventional buck convertor.

• 전력전자학회논문지
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• 제21권6호
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• pp.506-513
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• 2016

In general, LLC converters show great promise in applications that require high efficiency, especially under light load conditions. In particular, LLC converters feature wide gain capability with pulse-frequency modulation and zero voltage switching over entire load conditions. However, output voltage increases in light load conditions. In this study, Bode plot and impedance asymptotes analyses were conducted to obtain insights into the regulation characteristics of LLC converters under light load conditions. To improve the regulation characteristic of LLC converters, a new resonant tank with an additional capacitor is proposed. The design guideline for the proposed LLC converter is determined by the Bode plot and impedance asymptotes analyses. Therefore, the proposed LLC converter achieves the light load regulation while maintaining the advantages of typical LLC converters.

• ETRI Journal
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• 제16권3호
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• pp.11-26
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• 1994

In Korea, the price schedule for local telephone combines two-part tariffs and peak-load pricing subject to rate-of-return (RoR) regulation. Although the effect of RoR regulation on two-part tariffs or peak-load pricing has been separately analyzed by many authors in some detail, the behaviour of regulated firm under combined two-part and peak-load pricing has not been studied until now. This paper examines the effect of regulation on the rate structure and welfare under combined two-part and peak-load pricing.

• 전기전자학회논문지
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• 제26권3호
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• pp.462-467
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• 2022

피드백 버퍼 구조는 오버슈트 및 언더슈트 현상 및 출력전압의 레귤레이션을 완화하기 위해 제안된다. 기존의 LDO 레귤레이터는 일정한 부하전류의 변화로 인해 발생하는 레귤레이션 전압 변화를 겪는다. 따라서 패스 트랜지스터의 게이트 단자의 전류를 충방전함으로써 패스 트랜지스터의 동작 속도가 향상된다. 피드백 버퍼 구조를 갖는 LDO 레귤레이터는 3.3~4.5V에서 동작하며 출력 전압은 3V이며, 최대 150mA의 부하 전류를 가집니다. 시뮬레이션 결과에 따라 부하전류가 150mA까지 일정하게 변화하였을 때 6.2mV의 레귤레이션 값을 확보하였다.

• 대한전기학회논문지:전력기술부문A
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• 제48권6호
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• pp.699-703
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• 1999

It is known that the LDC(Line-Drop Compensator) becomes to lose the function of proper voltage regulation for its load currents due to the real and reactive power generated by DGS(Dispersed Generation System), when DGS is introduced into the power distribution system of which the voltage is controlled by LDC. Therefore, in that case, it is very difficult to regulate the distribution line voltage properly by using LDC. One possible solution for this problem is the real-time voltage regulation method which is to optimally regulate the sending-end voltage in real-time by collecting the real-time load data of each load data of each load section between measuring points and by calculating the optimal seding-end voltage value from them. For this, we must know the real-time load data of each load section. In this paper, a modeling method of representing a load section on high voltage line with DGSs as an equivalent lumped load is proposed for gaining the real-time load data. In addition a method of locating the measuring points is proposed. Then, these proposed methods are evaluated through computer simulations.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2010년도 하계학술대회 논문집
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• pp.125-126
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• 2010

In this paper, a novel multiple output converter using quasi load is proposed. Conventional multiple output converters using multi-winding transformer has poor output voltage regulations. To solve this problem, there are many proposals like post regulation method, weighted control method, and etc. However, the post regulation method regulates output voltage tightly but its conduction loss and cost are increased. And the weighted control can achieve high efficiency and low cost but its regulation is not enough. To solve these problems, this paper proposes a novel multiple output converter using quasi load. The proposed method uses a quasi load which acts like an active dummy load for tight regulation but there is rarely increase of loss and cost. The proposed method is verified by hardware test by two output(24V and 15V) flyback type converter.

• 전기전자학회논문지
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• 제27권3호
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• pp.308-312
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• 2023

게이트 전류 감지 구조는 LDO 레귤레이터가 오버슈트 또는 언더슈트 상황 발생 시 출력전압의 레귤레이션을 보다 효과적으로 제어하기 위해 제안되었다. 기존의 전형적인 LDO 레귤레이터는 부하전류가 변화할 때 레귤레이션 전압 변화가 발생한다. 하지만 게이트 전류 감지 구조를 이용하여 패스 트랜지스터에 있는 게이트 단자 전류를 공급/방전 함으로 인해 패스 트랜지스터의 동작 속도를 더욱 향상시킬 수 있다. 게이트 전류 감지 구조를 이용한 LDO 레귤레이터의 입력전압은 3.3 V ~ 4.5 V 이며 출력 전압은 3 V이고 부하 전류는 최대 250 mA의 값을 갖는다. 시뮬레이션 결과, 부하 전류가 250 mA 까지 변화할 때 약 9 mV의 전압 변화 값을 확인하였다.

• 전기학회논문지P
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• 제60권3호
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• pp.126-132
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• 2011

A conventional LDO(Low Dropout Regulator) uses one OPAMP and one signal path. This means that OPAMP's DC Gain and Bandwidth can't optimize simultaneously within usable power. This also appears that regulation property and settling time of LDO can't improve at the same time. Based on this idea, a proposed LDO uses two OPAMP and has two signal path. To improve regulation property, OPAMP where is used in the path which qualities DC gain on a large scale, bandwidth designed narrowly. To improve settling time, OPAMP where is used in the path which qualities DC gain small, bandwidth designed widely. A designed LDO used 0.5um 1P2M process and provided 200mA of output current. A line regulation and load regulation is 12.6mV/V, 0.25mV/mA, respectively. And measured settling time is 1.5us in 5V supply voltage.