• The Journal of Engineering Research
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• v.4 no.1
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• pp.35-45
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• 2002

This paper deals with the scheduling problems which are the most important subtask in High-Level Synthesis. Especially, we have concentrated our attentions on the data-path scheduling which can get the structural informations from the behavioral algorithm as a first step in synthesis procedure. Suggest Forward scheduling methode is executed the ASAP and ALAP scheduling to use the fifth – order elliptic wave filter of a standard benchmark model, and then it is drawing up T.N matrix table by the number of resource and control-step, using the table extract of the simple than down-limit value of the control-step for the number of given resource to use this table. All of existing list scheduling techniques determine the priority functions first, and then do the operation scheduling, But, the suggested forward scheduling technique does the schedule first, and determines the priority functions if needed in scheduling process.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.4
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• pp.177-182
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• 2018

The home-and-way round-robin sports leagues scheduling problem with minimum brake is very hard to solve in polynomial time. This problem is NP-hard, the complexity status is not yet determined. This paper suggests round-robin sports leagues scheduling algorithm not computer-aided program but by hand with O(n) time complexity for arbitrary number of teams n with always same pattern. The algorithm makes a list of mathes using $n{\times}n$ canonical latin square for n=even teams. Then trying to get home(H) and away(A) with n-2 minimum number of brakes. Also, we get the n=odd scheduling with none brakes delete a team own maximum number of brakes from n=even scheduling.

• Journal of Korean Institute of Industrial Engineers
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• v.37 no.4
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• pp.408-414
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• 2011

The objective of this paper is to define local optimization algorithms (LOA) to solve Resource-Constrained Project Scheduling Problem (RCPSP) and analyze the performance of these algorithms. By representing solutions with activity list, three primitive LOAs, i.e. forward and backward improvement-based, exchange-based, and relocation-based LOAs are defined. Also, combined LOAs integrating two primitive LOAs are developed. From the experiments with standard test set J120 generated using ProGen, the FBI-based LOA demonstrates to be an efficient algorithm. Moreover, algorithms combined with FBI-based LOA and other LOA generate good solutions in general. Among the considered algorithms, the combined algorithm of FBI-based and exchangebased shows best performance in terms of solution quality and computation time.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.23 no.56
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• pp.9-18
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• 2000

This paper considers the problem of two-machine, M-parallel flow shop scheduling to minimize makespan, and proposes a series of heuristic algorithms and a branch and bound algorithm. Two processing times of each job at two machines on each line are identical on any line. Since each flow-shop line consists of two machines, Johnson's sequence is optimal for each flow-shop line. Heuristic algorithms are developed in this paper by combining a "list scheduling" method and a "local search with global evaluation" method. Numerical experiments show that the proposed heuristics can efficiently give optimal or near-optimal schedules with high accuracy. with high accuracy.

• Journal of Korea Multimedia Society
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• v.5 no.3
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• pp.323-330
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• 2002

Recently, the existing embedded real-time operating systems(RTOSs) are being developed in terms of various modified versions in every application fields. Major characteristics and difference of these OSs lie in their distinct development of mechanisms which can be used in various environment and task-scheduling function which can control time-limited contingencies. In this paper, we design and implement round/robin scheduling algorithm based on time-sharing with equal-priority for multiple tasks which are provided preemptive and priority task allocation function in $\mu{C/OS-II}$ version 2.03. We propose the most important event-ready list structure in $\mu{C/OS-II}$; kernel, and provide the running result for multiple tasks with equal priority for the proposed structure.

• ETRI Journal
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• v.27 no.5
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• pp.533-538
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• 2005

We developed a pipelined scheduling technique of functional hardware and software modules for platform-based system-on-a-chip (SoC) designs. It is based on a modified list scheduling algorithm. We used the pipelined scheduling technique for a performance analysis of an MPEG4 video encoder application. Then, we applied it for architecture exploration to achieve a better performance. In our experiments, the modified SoC platform with 6 pipelines for the 32-bit dual layer architecture shows a 118% improvement in performance compared to the given basic SoC platform with 4 pipelines for the 16-bit single-layer architecture.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.2
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• pp.83-87
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• 2011

Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. Almost systems require that the clock length is required prior to scheduling, the best value of the clock can be found only after evaluating different schedules. In this study, we presents a scheduling method that works simultaneously with synthesis by selecting a clock from a chainable operation set. Our scheduling algorithm is based on list scheduling and executes chaining considering bit level delays based on selected clock period. Experimental results show that our method improves the performance by 18 percent.

• Journal of the Korea Society for Simulation
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• v.20 no.1
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• pp.87-96
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• 2011

DEVS(Discrete Event Systems Specification) is a set theoretic formalism developed for specifying discrete event system. For execution of DEVS, we need an execution environment, which consists of simulation engine and models interpreted by the simulation engine. Common existing environments use hierarchical scheduling algorithm for DEVS execution. This hierarchical scheduling is a proper algorithm for DEVS execution because of hierarchical and modular characteristics. But this algorithm has overheads owing to message passing and time management. To overcome these overheads, we apply event-oriented simulation to DEVS execution and we remove hierarchical overheads. In eventoriented simulation, the scheduling of model execution is performed by events and event list. We propose three event-oriented execution environments for DEVS and experiment about the performance of our proposed environments in comparison with the existing execution environment using the hierarchical scheduling. The experimental results show our environments works better than existing environment using the hierarchical scheduling.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.83-88
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• 2008

In this paper, a new scheduling method considering bit-level delays for high-level synthesis is proposed. Conventional bit-level delay calculation for high-level synthesis was usually limited for specific resources. However, we have developed an efficient bit-level delay calculation method which is applicable to various resources, in this research. This method is applied to scheduling. The scheduling algorithm is based on list scheduling and executes chaining considering bit-level delays. Furthermore, multi-cycle chaining can be allowed to improve performance under resource constraints. Experimental results on several well-known DSP examples show that our method improves the performance of the results by 14.7% on the average.

• The KIPS Transactions:PartA
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• v.8A no.3
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• pp.279-286
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• 2001

This paper proposes a low power resource allocation and scheduling algorithm that minimized power consumption such as DSP circuit in high-level synthesis process. In this paper, we have used list-scheduling method for low power design in scheduling step. Also, it increase possibility to reuse input through resource sharing when assign resource. After scheduling, the resources allocation uses the power function in consideration of the result of calculating average hamming distances and switching activity between two input. First, it obtain switching activity about input value after calculate average hamming distances between two operator and find power value make use of bit pattern of the input value. Resource allocation process assign operator to minimize average hamming distance and power dissipation on all occasions which is allocated at each control step according to increase control step. As comparing the existed method, the execution time becomes fast according to number of operator and be most numberous control step. And in case of power that consume, there is decrease effect from 6% to 8% to be small.