• Information Display
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• v.14 no.5
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• pp.12-22
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• 2013

• Proceedings of the Korean Vacuum Society Conference
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• 1994.06a
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• pp.103-104
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• 1994

• Electrical & Electronic Materials
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• v.23 no.3
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• pp.14-21
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• 2010

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.11a
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• pp.96-96
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• 2002

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.41-43
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• 2004

Plasma polymerized para-xylene ($PP_PX$) deposited by plasma-enhanced chemical vapor deposition (PECVD) was used as the barrier layer on the polyethylene terephthalate (PET) substrate to improve lifetime of the flexible organic light-emitting diodes (FOLEDs). The $PP_PX$ barrier layer deposited on top of the PET substrate with plasma power of 30 W at deposition pressure of 0.2 torr showed transmittance spectra good enough to be applied in FOLED on PET substrates. FOLEDs with the $PP_PX$ barrier layer (barrier-FOLEDs) showed similar I-V and B-V characteristics to FOLEDs without the $PP_PX$ layer (control-FOLEDs). The lifetime of barrier-FOLED was two times longer than that of the control-FOLED. With $PP_PX$ passivation layers, lifetimes of both control and barrier-FOLEDs were improved by more than 4 times. These results show that PECVD deposited $PP_PX$ layers can be used as barrier layers for FOLEDs on plastic substrates as well as passivation layers for general OLEDs.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• Progress in Superconductivity and Cryogenics
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• v.17 no.3
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• pp.1-4
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• 2015

Production of $MgB_2$ film on metallic Hastelloy with SiC as the buffer layer was achieved by means of hybrid physical-chemical vapor deposition technique, whereas SiC buffer layers with varied thickness of 170 and 250 nm were fabricated inside a pulsed laser deposition chamber. Superconducting transition temperature and critical current density were verified by transport and magnetic measurement, respectively. With SiC buffer layer, the reduced delaminated area at the interface of $MgB_2$-Hastelloy and the slightly increased $T_c$ of $MgB_2$ tapes were clearly noticed. It was found that the upper critical field, the irreversibility field and the critical current density were reduced when $MgB_2$ tapes were buffered with SiC buffer layer. Clarifying the mechanism of SiC buffer layer in $MgB_2$ tape in affecting the superconducting properties is considerably important for practical applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.04b
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• pp.65-68
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• 2002

The effect of low-temperature ZnO buffer layer has been investigated for the optical properties of ZnO thin films. ZnO buffers and thin films have been deposited using the pulsed laser deposition technique. ZnO buffer layers were grown at $200^{\circ}C$ with various thickness of 0 to 60 nm, followed by raising the substrate temperature to $400^{\circ}C$ to grow $2{\mu}m$ ZnO thin films. The buffer layers could relax stresses induced by the lattice mismatch and different thermal expansion coefficients between ZnO thin films and sapphire substrate. In order to identify the optical properties of ZnO thin films, PL measurement was used. From the results of PL measurement, all the fabricated ZnO thin films with buffer layers have shown intensive UV emission with a narrow linewidth. ZnO thin films with buffer layer of 20 nm have shown the strongest UV emission. It was found that the use of ZnO buffer layer plays an important role to improve the intensive UV emission of the ZnO thin films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.115-116
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• 2008

The ferroelectric vinylidene fluoride-trifluoroethylene ($VF_2$-TrFE) and $Al_2O_3$ passivation layer for the Metal/Insulator/Ferroelectric/Semiconductor (MIFS) structure were deposited using spin coating and remote plasma atomic layer deposition (RPALD), respectively. A 2.5 ~ 3 wt % diluted solution of purified vinylidene fluoride-trifluoroethylene ($VF_2$: TrFE=70:30) in a DMF solution were prepared and deposited on silicon wafer at a optimized spin speed. After annealing in a vacuum ambient at 150 ~ $200^{\circ}C$ for 60 min, upper insulator layer were deposited at temperature ranging from 100 ~ $150^{\circ}C$ by RPALD. We described electrical and structural properties of MIFS fabricated by spin coating and RPALD methods.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.04a
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• pp.109-109
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• 2000

Recently, carbon nanotube has been investigating for field emission display ( (FED) applications due to its high electron emission at relatively low electric field. However, the growing of carbon nanotube generally requires relatively high temperature processing such as arc-discharge (5,000 ~ $20,000^{\circ}C$) and laser evaporation (4,000 ~ $5,000^{\circ}C$) methods. In this presentation, low temperature growing of carbon nanotube by plasma enhanced chemical vapor deposition (PECVD) using nickel catalyst which is compatible to conventional FED processing temperature will be described. Carbon n notubes with average length of 100 run and diameter of 2 ~ $3\mu$ill were successfully grown on silicon substrate with native oxide layer at $550^{\circ}C$using nickel catalyst. The morphology and microstructure of carbon nanotube was highly depended on the processing temperature and nickel layer thickness. No significant carbon nanotube growing was observed with samples deposited on silicon substrates without native oxide layer. This is believed due to the formation of nickel-silicide and this deteriorated the catalytic role of nickel. The formation of nickel-silicide was confirmed by x-ray analysis. The role of native oxide layer and processing parameter dependence on microstructure of low temperature grown carbon nanotube, characterized by SEM, TEM XRD and R없nan spectroscopy, will be presented.