• Journal of information and communication convergence engineering
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• v.9 no.6
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• pp.721-724
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• 2011

Polymer base organic PN junction with various ion types was studied. Low-energy ion implantation technique(~keV) is very useful in physical doping on PPP(Polyparaphenylene) polymer. By double implantation, effective organic PN junction was achieved. The best obtained electrical I-V property was rectification ratio which was about 10000. However, still have problems in low junction current density.

• 한국초전도학회:학술대회논문집
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• v.13
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• pp.45-45
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• 2003

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.12
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• pp.973-977
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• 2010

The temperature of junction in LED affects the life time and performance. however, the measurement of junction temperature in module is very difficult. In this paper, to measure the junction temperature in LED module, optical and electrical properties is measured in single package in temperature from 25 [$^{\circ}C$] to 85 [$^{\circ}C$], and then junction temperature can is estimated in module with measuring the average voltage of single package. As results, the junction temperature of single package is measured the temperature of 61.2 [$^{\circ}C$] in ambient temperature, also, the junction temperature of LED module is measured the temperature of 72.5 [$^{\circ}C$] in ambient temperature.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.386-386
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• 2012

We studied a bilateral switching device for spin transfer torque (STT-MRAM) based on 3D device simulation. Metal/P/N+or Metal/N/P+ junction device with $30{\times}30nm2$ area which is composed of one side schottky junction at Metal/P/N+ and Metal/N/P+ provides sufficient bidirectional current flow to write data by a drain induced barrier lowering (DIBL). In this work, Junction device confirmed that write current is more than 30 uA at 2 V, It is also has high on-off ratio over 105 under read operation. Junction device has good process feasibility because metal material of junction device could have been replaced by bottom layer of MTJ. Therefore, additional process to fabricate two outer terminals is not need. so, it provides simple fabrication procedures. it is expected that Metal/P/N+ or Metal/N/P+ structure with one side schottky junction will be a promising switch device for beyond 30 nm STT-MRAM.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.2
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• pp.89-95
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• 1995

The structure of boron ion-implanted pn junctio in the vacancy-doped p-type HgCdTe was investigated with the differential Hall measurement. The as-implanted junction showed the electron concentration as high as 1${\times}10^{18}/cm^{3}$ and the junction depth of 0.6.mu.m. When the HgCdTe junction was heated in oven, the electron concentration near the junction decreased and the junction depth increased as the annealing temperature and time increased. The junction structure after the thermal annealing was n$^{+}$/n$^{-}$/p. For the 200.deg. C 20min annealed sample, the electron mobility was 10$^{4}cm^{2}/V{\cdot}$s near the surface(n$^{+}$), and was larger thatn 10$^{5}cm^{2}/V{\cdot}$s near the junction(n$^{+}$). The junction formation mechanism is conjectured as follows. When HgCdTe is ion-implanted, the ion energy generates crystal defecis and displaced Hg atoms HgCdTe is ion-implanted, the ion energy generates crystal defecis and displaced Hg atoms near the surface. The displaced Hg vacancies diffuse in easily by the thernal treatment and a fill the Hg vacancies in the p-HgCdTe substrate. With the Hg vacancies filled completely, the GfCdTe substrate becomes n-type because of the residual n-type impurity which was added during the wafer growing. Therefore, the n$^{+}$/n$^{-}$/p regions are formed by crystal defects, residual impurities, and Hg vacancies, respectively.

• Journal of the Korean Geographical Society
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• v.33 no.3
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• pp.355-364
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• 1998

Flume experiments are conducted to describe the channel morphology at a tributary junction and to examine the influence of channel arrangements and hydrologic conditions on the channel morphology. When flow momenta of two tributaries are equal, a receiving stream tends to align with an axis bisecting junction angle. It causes lateral migration of a receiving stream according to an initial channel arrangement. As a result, the post-fonfluent channel morphology varies with plan geometry of a confluence such as symmetry, transition and asymmetry. Bed scour is the most notable morphology within a junction site. Its shape is characterized by steep walls which are primarily influenced by junction angle. Key control of scour dimension is also junction angle. Although the principle of accordant junction has been undoubtedly accepted, discordance is commonly developed at model and natural stream confluences. Unit discharge ratio of confluent streams is the most crucial factor because both discharge and sediment concentration ratios have an effect on discordance at a junction.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.83.1-83.1
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• 2010

Hydrogenated a-SiGe middle cell for triple junction solar cell was investigated with various process parameters. a-SiGe I-layer was deposited at substrate temperature $245^{\circ}C$ and hydrogen content(R) was up to 26.7. Low optical bandgap(1.45eV) of a-SiGe cell was applied for middle cell although a-SiGe single cell efficiency with low Ge content was higher. And this cell was applied to the middle cell of a glass superstrate type a-Si/a-SiGe/uc-Si triple junction solar cell. The triple junction solar cell was resulted in the initial efficiency of about 9%, area $0.25cm^2$, under global AM 1.5 illumination.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.143-146
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• 2000

This paper presents a study on design for the k-junction of a feeder waveguide with an inductive wall using FDTD method. The feed structure consists of a single waveguide plated on the same layer as radiating waveguide and is characterized by the unit divider, railed a $\pi$-Junction. This $\pi$-Junction with an inductive wall splits part of the power into two branch waveguide through one coupling window, and can excite densely arrayed waveguide at equal phase and amplitude. The power dividing characteristics of a $\pi$ -Junction obtained by FDTD method are compared with one of Galerkin's method of moments. The scattering matrices a $\pi$ -junction calculated by FDTD method are realized.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.82-87
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• 2007

The electrical properties of metallic junction diodes and metallic source/drain (S/D) Schottky barrier metal-oxide-semiconductor field-effect transistor (SB-MOSFET) were simulated. By using the abrupt metallic junction at the S/D region, the short-channel effects in nano-scaled MOSFET devices can be effectively suppressed. Particularly, the effects of trap states at the metal-silicide/silicon interface of S/D junction were simulated by taking into account the tail distributions and the Gaussian distributions at the silicon band edge and at the silicon midgap, respectively. As a result of device simulation, the reduction of interfacial trap states with Gaussian distribution is more important than that of interfacial trap states with tail distribution for improving the metallic junction diodes and SB-MOSFET. It is that a forming gas annealing after silicide formation significantly improved the electrical properties of metallic junction devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.4
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• pp.270-275
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• 2012

Power MOSFET(metal oxide silicon field effect transistor) operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. But on-resistance characteristics depending on the increasing breakdown voltage spikes is a problem. So 600 V planar power MOSFET compare to 1/3 low on-resistance characteristics of super junction MOSFET structure. In this paper design to 600 V planar MOSFET and super junction MOSFET, then improvement of comparative analysis breakdown voltage and resistance characteristics. As a result, super junction MOSFET improve on about 40% on-state voltage drop performance than planar MOSFET.