• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.1
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• pp.101-105
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• 2024

4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (R_on,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (D_it) at the SiO₂/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO₂/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N₂ diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N₂ gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO₂/4H-SiC interface, thereby reducing the D_it.

• The Bulletin of The Korean Astronomical Society
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• v.38 no.1
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• pp.46.2-46.2
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• 2013

The neutral component of the interstellar medium (ISM) is segregated into the cold neutral medium (CNM) and warm neutral medium (WNM) as a result of thermal instability. It was found that the CNM--WNM evaporation interface, across which the CNM undergoes thermal expansion, is linearly unstable to corrugational disturbances, in complete analogy with the Darrieus-Landau instability (DLI) in terrestrial flames. To explore dynamical consequences of the DLI in the ISM, we perform a linear stability analysis of the DLI including the effect of thermal conduction as well as nonlinear hydrodynamic simulations. We find that the DLI is suppressed at short length scales via heat transport. The linear growth time of the fastest growing mode is proportional to the square of the evaporation flow speed of the CNM relative to the interface and is typically >10 Myr. In the nonlinear stage, perturbations grow into cusp-like structure protruding toward the WNM, and soon reach a steady state where the evaporation rate is increased by a factor of 2 compared to the initial state. We demonstrate that the amplitude of the interface distortion and enhancement in evaporation rate are determined primarily by the density ratio between the CNM and WNM. Given quite a long growth time and highly subsonic velocities at saturation, the DLI is unlikely to play an important role in the ISM dynamics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.7
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• pp.559-563
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• 2002

A threshold voltage model of SiC N-channel MOSFETs for high-temperature and hard radiation environments has been developed and verified by comparing with experimental results. The proposed model includes the difference in the work functions, the surface potential, depletion charges and SiC/$SiO_2$acceptor-like interface state charges as a function of temperature. Simulations of the model shoved that interface slates were the most dominant factor for the threshold voltage decrease as the temperature increase. To verify the model, SiC N-chnnel MOSFETS were fabricated and threshold voltages as a function of temperature were measured and compared wish model simulations. From these comparisons, extracted density of interface slates was $4{\times}10^{12}\textrm{cm}^{-2}eV^{-1}$.

• Journal of computational fluids engineering
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• v.15 no.3
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• pp.73-80
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• 2010

In this paper, we present the exact Riemann solver for the compressible liquid-gas two-phase shock tube problems. We hereby consider both isentropic and non-isentropic two-phase flows. The shock tube has a diaphragm in the mid-section which separates the liquid medium on the left and the gas medium on the right. By rupturing the diaphragm, various waves are observed on the phasic field variables such as pressure, density, temperature and void fraction in the form of rarefaction wave, shock wave and material interface (contact discontinuity). Both phases are treated as compressible fluids using the linearized equation of state or the stiffened-gas equation of state. We solve several shock tube problems made of a high/low pressure in the liquid and a low/high pressure in the gas. The wave propagations are well resolved by the exact Riemann solutions.

• Solar Energy
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• v.20 no.1
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• pp.11-20
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• 2000

To get more insight into the buffering effects of the p-${\mu}c$-Si:H Inserted at the p-a-SiC:H/i-a-Si:H interface, we present a systematic numerical simulation using Gummel-Schafetter method. The reduced recombination loss at the p/i interface due to a constant bandgap buffer is analysed in terms of the variation of the p/i Interface region with a short lifetime and the characterisitics of the buffer such as mobility bandgap, acceptor concentration, and D-state density. The numerical modeling on the constant bandgap buffer demonstrates clearly that the buffering effects of the thin p-${\mu}c$-Si:H originate from the shrinkage of highly defective region with a short lifetime in the vicinity of the p/i interface.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.807-813
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• 1986

Measurements of interface states in a MOS capacitor by DLTS system using wideband monophase lock-in amplifier are discussed. A new signal analysis method that takes into account the bias pulse width and the gate off width is presented to remove the errors in the measured parameters of interface states resulting from the traditional method which neglects the effect of those widths. Theoretical calculations are made for the parameters related to the rate window, signal to noise ratio, and the energy resolution. On the grounds of this discussion, interface states of the MOS capacitor on p-type substrate of (110) orentation are measured with the optimal gate-off width with respect to the S/N ratio and the energy resolution. The results are interface state density of the order of 10**10 (cm-\ulcornereV**-1) to 10**11 (cm-\ulcornereV**-1) in the energy range of Ev+0.15(dV) to Ev+0.5(eV), and constant capture cross section of the order of 10**-16 (cm\ulcorner.

• Proceedings of the Safety Management and Science Conference
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• 2002.11a
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• pp.273-277
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• 2002

In the electrode fabrication of unit cell, we found that optimal the electrochemical characteristics were obtained with at 90 wt.% of activated carbon(BP-20), 5 wt.% of conducting agent(Ppy, Super P) and 5 wt.% of P(VdF-co-HFP)/PVP mixed binder. The electrochemical characteristics of unit cell with Ppy improver were as follows : 37.6 F/g of specific capacitance, 0.98 $\Omega$ of AC-ESR, 2.92 Wh/kg and 6.05 Wh/L of energy density, and 754 W/kg and 1,562 W/L of power density. It was confirmed that internal resistance were reduced due to the increase of electrical conductivity and filling density by the introduction of conductivity agent, and content of conducting agent was suitable in the range of 4~6 wt.%. According to the impedance measurement of the electrode with conductivity agent, we found that it was possible to charge rapidly by the fast steady-state current convergence due to low equivalent series resistance(AC-ESR), fast charge transfer rate at interface between electrode and electrolyte, and low RC time constant.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.12
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• pp.56-63
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• 1994

The effects of sulfur treatments on the barrier heithts of Schottky contacts and the interface-state density of metal-insulator-semiconductor (MIS) capacitors on InP have been investigated. Schottky contacts were formed by the evaporation of Al, Au, and Pt on n-InP substrate before and after (NH$_{4}$)$_{2}$S$_{x}$ treatments, respectively. The barrier height of InP Schottky contacts was measured by their current-voltage (I-V) and capacitance-voltage (C_V) characteristics. We observed that the barrier heights of Schottky contacks on bare InP were 0.35~0.45 eV nearly independent of the metal work function, which is known to be due to the surface Fermi level pinning. In the case of sulfur-treated Au/InP ar Pt/InP Schottky diodes, However, the barrier heights were not only increased above 0.7 eV but also highly dependent on the metal work function. We have also investigated effects of (NH$_{4}$)$_{2}$S$_{x}$ treatments on the distribution of interface states in Si$_{3}$N$_{4}$InP MIS diodes where Si$_{3}$N$_{4}$ was provided by plasma enhanced chemical vapor deposition (PECVD). The typical value of interface-state density extracted feom 1 MHz C-V curve of sulfur-treated SiN$_{x}$/InP MIS diodes was found to be the order of 5${\times}10^{10}cm^{2}eV^{1}$. This value is much lower than that of MiS diodes made on bare InP surface. It is certain, therefore, that the (NH$_{4}$)$_{2}$S$_{x}$ treatment is a very powerful tool to enhance the barrier heights of Au/n-InP and Pt/n-InP Schottky contacts and to reduce the density of interface states in SiN$_{x}$/InP MIS diode.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.239-242
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• 1998

Ca $F_2$ films have superior gate insulator properties than conventional gate insulator such as $SiO_2$, Si $N_{x}$, $SiO_{x}$, and T $a_2$ $O_{5}$ to the side of lattice mismatch between Si substrate and interface trap charge density( $D_{it}$). Therefore, this material is enable to apply Thin Film Transistor(TFT) gate insulator. Most of gate oxide film have exhibited problems on high trap charge density, interface state in corporation with O-H bond created by mobile hydrogen and oxygen atom. This paper performed Ca $F_2$ property evaluation as MIM, MIS device fabrication. Ca $F_2$ films were deposited at the various substrate temperature using a thermal evaporation. Ca $F_2$ films was grown as polycrystalline film and showed grain size variation as a function of substrate temperature and RTA post-annealing treatment. C-V, I-V results exhibit almost low $D_{it}$(1.8$\times$10$^{11}$ $cm^{-1}$ /le $V^{-1}$ ) and higher $E_{br}$ (>0.87MV/cm) than reported that formerly. Structural analysis indicate that low $D_{it}$ and high $E_{br}$ were caused by low lattice mismatch(6%) and crystal growth direction. Ca $F_2$ as a gate insulator of TFT are presented in this paper paperaper

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1646-1648
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• 2000

This paper investigated structural and electrical properties of $Y_{2}O_3$ as a buffer layer of sin91r transistor FRAM (ferroelectric RAM). $Y_{2}O_3$ buffer layers were deposited at a low substrate temperature below 400$^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post- annealing temperature, and suppression of interfacial $SiO_2$ layer generation. for a well-fabricated sample, we achieved that leakage current density ($J_{leak}$) in the order of $10^{-7}A/cm2$, breakdown electric field ($E_{br}$) about 2 MV/cm for $Y_{2}O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_{2}O_3$/Si as low as $8.72{\times}10^{10}cm^{-2}eV^{-1}$. The low interface states were obtained from very low lattice mismatch less than 1.75%.