• 한국진공학회지
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• 제12권3호
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• pp.168-173
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• 2003

유리 기판 위에 증착된 비정질 실리콘 박막의 고상 결정화에 대한 새로운 방법을 제시하였다. 비정질 실리콘 박막의 하부에 패턴 된 다양한 크기의 $TiSi_2$ 박막을 전기저항 가열 방식으로 가열함으로서 비정질 실리콘이 고상 결정화 되도록 하였다. 박막히터를 이용한 열처리는 매우 빠른 열처리 공정으로써, 일반적인 로에 의한 열처리에 비해 매우 낮은 thermal budget을 가지므로, 유리기판 위에서도 고온 열처리가 가능하다는 장점을 가진다. 본 연구에서는 500 $\AA$의 비정질 실리콘 박막을 약 $850^{\circ}C$ 이상의 높은 온도에서 수 초 내에 결정화 할 수 있음을 보였으며, 열처리 조건의 변화에 따른 영향과 지역선택성의 장점을 보였다.

• Journal of Magnetics
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• 제7권2호
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• pp.59-62
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• 2002

Magnetic tunnel junctions (MTJs) were fabricated with high bias for plasma oxidation and the effects of annealing on the temperature dependence of tunneling magnetoresistance (TMR) were investigated experimentally. As-grown, TMR increases, peaks around 160 K, and decreases with increasing temperature from 80 K to 300 K. When MTJs are annealed, $T_{max}$, the temperature at which maximum TMR is obtained, decreases as annealing temperature increases to the optimal point. In order to explain this abnormal temperature dependence of TMR, the difference of conductance between parallel and antiparallel alignments of magnetizations as a function of temperature is also analyzed. The shifts of $T_{max}$ due to annealing process are described phenomenologically with spin-dependent transfer rates of electrons tunnel through the barrier.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.692-695
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• 1999

This paper presents annealing characteristics of CrN thin-film strain gauges, which were deposited on glass by DC reactive magnetron sputtering in an argon-nitrogen atmosphere)Ar-(5-~25%)$N_2$. The physical and electrical characteristics of these films investigated with the thickness range 3500$\AA$ of CrN thin films, annealing temperature (100~30$0^{\circ}C$) and annealing time (24-72hr) . The optimized condition of CrN thin-film strain gauges were thickness range of 3500$\AA$ and annealing condition(30$0^{\circ}C$ , 48hr) in Ar-10%$N_2$ deposition atmosphere. Under optimum conditions, the CrN thin-films for strain gauge is obtained a high resistivity, $\rho$=1147.65$\Omega$cm a low temperature coefficient of 11.17. And change in resistance after annealing for the CrN thin film were quitely linear and stable.

• 한국재료학회지
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• 제22권11호
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• pp.591-597
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• 2012

For heat exchanger applications, 2-ply clad materials were fabricated by rolling of aluminum (Al) and mild steel sheets. Effects of annealing temperature on interface properties, especially on inter-layer formation and softening of strain hardened mild-steel, for Al/mild steel clad materials, were investigated. To obtain optimum annealing conditions for the Al/mild steel clad materials, annealing temperature was varied from room temperature to $600^{\circ}C$. At the annealing temperature about $450^{\circ}C$, an inter-layer was formed in an island-shape at the interface of the Al/mild steel clad materials; this island expanded along the interface at higher temperature. By analyzing the X-ray diffraction (XRD) peaks and the energy dispersive X-ray spectroscopy (EDX) results, it was determined that the exact chemical stoichiometry for the inter-layer was that of $Fe_2Al_5$. In some samples, an X-layer was formed between the Al and the inter-layer of $Fe_2Al_5$ at high annealing temperature of around $550^{\circ}C$. The existence of an X-layer enhanced the growth of the inter-layer, which resulted in the delamination of the Al/mild-steel clad materials. Hardness tests were also performed to examine the influence of the annealing temperature on the cold deformability, which is a very important property for the deep drawing process of clad materials. The hardness value of mild steel gradually decreased with increasing annealing temperature. Especially, the value of hardness sharply decreased in the temperature range between $525^{\circ}C$ and $550^{\circ}C$. From these results, we can conclude that the optimum annealing temperature is around $550^{\circ}C$ under condition of there being no X-layer creation.

• 한국전기전자재료학회논문지
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• 제37권1호
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• pp.43-47
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• 2024

The size of semiconductor devices has been scaled down to improve packing density and output performance. However, there is uncontrollable spreading of the dopants that comprise the well, punch-stop, and channel-stop when using high-temperature annealing processes, such as rapid thermal annealing (RTA). In this context, low-temperature deuterium annealing (LTDA) performed at a low temperature of 300℃ is proposed to reduce the thermal budget during CMOS fabrication. The LTDA effectively eliminates the interface trap in the gate dielectric layer, thereby improving the electrical characteristics of devices, such as threshold voltage (V_TH), subthreshold swing (SS), on-state current (I_ON), and off-state current (I_OFF). Moreover, the LTDA is perfectly compatible with CMOS processes.

• 한국전기전자재료학회논문지
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• 제14권12호
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• pp.1016-1022
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• 2001

This study presents the microstructure-electrical property relationship of reactive-sputtered Ta$_2$O$_{5}$ MIM capacitor structure processed by annealing in a vacuum and $O_2$ ambience. A microstructural investigation showed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-Ta$_2$O$_{5}$ in $700^{\circ}C$ annealing. On annealing under the $O_2$ atmosphere, the Ta$_2$O$_{5}$ film exhibited the trend of its composition\`s approaching to stoichiometry from off-stoichiometry, analyzed by EPMA, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. In the case of low temperature vacuum-annealing treatment, the leakage current behavior was stable irrespective of applied electric field. In the high temperature-annealed film at a vacuum condition, the electrical properties was observed to deteriorate. The results state that in Ta$_2$O$_{5}$ film annealed at $O_2$ atmosphere, gives rise to improvement of electrical characteristics in the capacitor were improved by reducing oxygen-vacancy and dandling Ta-O bond.-O bond.

• 한국재료학회지
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• 제30권5호
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• pp.246-251
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• 2020

The annealing characteristics of cold-rolled Al-6.5Mg-1.5Zn-0.5Fe-0.5Mn alloy, newly designed as an automobile material, are investigated in detail, and compared with those of other aluminum alloys. Using multi-pass rolling at room temperature, the ingot aluminum alloy is cut to a thickness of 4 mm, width of 30 mm, and length of 100 mm to reduce the thickness to 1 mm (r = 75 %). Annealing after rolling is performed at various temperatures ranging from 200 to 500 ℃ for 1 hour. The specimens annealed at temperatures up to 300 ℃ show a deformation structure; however, from 350 ℃ they have a recrystallization structure consisting of almost equiaxed grains. The hardness distribution in the thickness direction of the annealed specimens is homogeneous at all annealing temperatures, and their average hardness decreases with increasing annealing temperature. The tensile strength of the as-rolled specimen shows a high value of 496 MPa; however, this value decreases with increasing annealing temperature and becomes 338 MPa after annealing at 400 ℃. These mechanical properties of the specimens are compared with those of other aluminum alloys, including commercial 5xxx system alloys.

• 한국결정성장학회:학술대회논문집
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• 한국결정성장학회 1997년도 Proceedings of the 12th KACG Technical Meeting and the 4th Korea-Japan EMGS (Electronic Materials Growth Symposium)
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• pp.231-236
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• 1997

To improve electrical properties and uniformity of high-low doped n-type GaAs, new ohmic contacts with a low-resistance and the superior uniformity was developed using a concept of hybrid ohmic contact. The hybrid ohmic contact displayed good surface and interface morphology and had minimum contact resistivity of 3${\times}$10-6 $\Omega$$\textrm{cm}^2$ in a wide annealing temperature ranged from 340$^{\circ}C$ to 420$^{\circ}C$, which was much wider than that of conventional ohmic contacts. The microstructural analysis showed that the Pd/Ge ohmic contact at low annealing temperature (∼300$^{\circ}C$) and also annealing temperature (∼400$^{\circ}C$), resulting ij hybrid ohmic contacts.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.346-349
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• 2002

High Power and high dose ion implantation is essentially needed to make power MOSFET devices based on SiC wafers, because the diffusivities of the impurities such as Al, N, p, B in SiC crystal are very low. In addition, it is needed high temperature annealing for electrical activation of the implanted species. Due to the very high annealing temperature, the surface morphology after electrical activation annealing becomes very rough. We have found the different surface morphologies between implanted and unimplanted region. The unimplanted region showed smoother surface morphology It implies that the damage induced by high energy ion implantation affects the roughening mechanism. Some parts of Si-C bonding are broken in the damaged layer, s\ulcorner the surface migration and sublimation become easy. Therefore the macrostep formation will be promoted. N-type 4H-SiC wafers, which were Al ion implanted at acceleration energy ranged from 30kev to 360kev, were activated at 1600$^{\circ}C$ for 30min. The pre-activation annealing for damage relaxation was performed at 1100-1500$^{\circ}C$ for 30min. The surface morphologies of pre-activation annealed and activation annealed were characterized by atomic force microscopy(AFM).

• 한국세라믹학회지
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• 제32권12호
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• pp.1377-1382
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• 1995

A high-resolution transmission electron microscopy study on the lattice defects formed in the high energy P ion implanted silicon was carried out on an atomic level. Results show that Lomer dislocations, 60$^{\circ}$perfect dislocations, 60$^{\circ}$ dislocation dipole and extrinsic stacking fault formed in the near Rp of as-implanted specimen. In the annelaed specimens, interstitial Frank loops, 60$^{\circ}$perfect disolations, 60$^{\circ}$dislocation dipoles, stacking faults, precipitates, perfect dislocation loops and <112> rodlike defects existed exclusively near in the Rp with various annealing temperature and time. From these results, it is concluded that extended secondary defects as well as the point defect clusters could be formed without annealing. Even at low temperature annealing such as 55$0^{\circ}C$, small interstitial Frank loops could be formed and precipitates were also formed by $700^{\circ}C$ annealing. The defect band annealed at 100$0^{\circ}C$ for 1 hr could be divided into two regions depending on the distribution of the secondary defects.