• 제목/요약/키워드: high performance encryption

검색결과 92건 처리시간 0.023초

Proposal for Analog Signature Scheme Based on RSA Digital Signature Algorithm and Phase-shifting Digital Holography

  • Gil, Sang Keun
    • Current Optics and Photonics
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    • 제4권6호
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    • pp.483-499
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    • 2020
  • In this paper, a novel analog signature scheme is proposed by modifying an RSA-based digital signature scheme with optical phase-shifting digital holography. The purpose of the proposed method is generating an analog signature to provide data confidentiality and security during the data transfer, compared to the digital signature. The holographic encryption technique applied to a hash value reveals an analog-type of pseudo-random pattern in the analog signature scheme. The public key and secret key needed to verify the analog signature are computed from public key ciphers which are generated by the same holographic encryption. The proposed analog signature scheme contains a kind of double encryption in the process of generating signature and key, which enhances security level more than the digital signature. The results of performance simulations show the feasibility of the highly secure signature scheme, and security analysis shows high robustness against known-message attacks and chosen-message attacks. In addition, the proposed method can apply to one-time signature schemes which can be used to sign only one message and it can also apply to authentication, e-mails, electronic banking and electronic data interchange.

Randomized Block Size (RBS) Model for Secure Data Storage in Distributed Server

  • Sinha, Keshav;Paul, Partha;Amritanjali, Amritanjali
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제15권12호
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    • pp.4508-4530
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    • 2021
  • Today distributed data storage service are being widely used. However lack of proper means of security makes the user data vulnerable. In this work, we propose a Randomized Block Size (RBS) model for secure data storage in distributed environments. The model work with multifold block sizes encrypted with the Chinese Remainder Theorem-based RSA (C-RSA) technique for end-to-end security of multimedia data. The proposed RBS model has a key generation phase (KGP) for constructing asymmetric keys, and a rand generation phase (RGP) for applying optimal asymmetric encryption padding (OAEP) to the original message. The experimental results obtained with text and image files show that the post encryption file size is not much affected, and data is efficiently encrypted while storing at the distributed storage server (DSS). The parameters such as ciphertext size, encryption time, and throughput have been considered for performance evaluation, whereas statistical analysis like similarity measurement, correlation coefficient, histogram, and entropy analysis uses to check image pixels deviation. The number of pixels change rate (NPCR) and unified averaged changed intensity (UACI) were used to check the strength of the proposed encryption technique. The proposed model is robust with high resilience against eavesdropping, insider attack, and chosen-plaintext attack.

암호모듈을 내장한 네트워크프로세서를 이용한 고속 VPN 시스템 설계 (Design of High-speed VPN System for Network Processor with Embedded Crypto-module)

  • 김정태
    • 한국정보통신학회논문지
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    • 제11권5호
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    • pp.926-932
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    • 2007
  • 본 논문에서는 임베디드 암호모듈을 내장한 네트워크프로세서의 고속 VPN 설계 방법에 대해서 알아본다. VPN을 구현할 수 있는 제품은 방화벽시스템(Firewall), 라우터, 인터넷 게이트웨이, 원격 접속 서버(Remote Access Server), Windows NT Server, VPN 전용 장치 그리고 VPN 소프트웨어 등을 들 수 있지만, 현재까지 어떤 제품 그리고 기술도 지배적인 방법으로 대두되지는 않고 있다. 국내외적으로 수십Giga급 이상의 VPN 보안장비와 관련된 체계화된 이론의 부족으로 인하여 관련된 연구는 많이 부족한 현실이며, 체계적이고 전문적인 연구를 수행하기 위해서는 많은 연구 활동이 필요하다. 결과적으로 향후 차세대 초고속 네트워크에서의 정보보호와 효과적인 네트워크 자원을 활용하기 위해서는 반드시 수십Giga급 이상의 VPN 보안장비에 대한 연구가 활발히 진행되리라 예상된다.

Efficient FPGA Implementation of AES-CCM for IEEE 1609.2 Vehicle Communications Security

  • Jeong, Chanbok;Kim, Youngmin
    • IEIE Transactions on Smart Processing and Computing
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    • 제6권2호
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    • pp.133-139
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    • 2017
  • Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.

Fully Homomorphic Encryption Based On the Parallel Computing

  • Tan, Delin;Wang, Huajun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제12권1호
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    • pp.497-522
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    • 2018
  • Fully homomorphic encryption(FHE) scheme may be the best method to solve the privacy leakage problem in the untrusted servers because of its ciphertext calculability. However, the existing FHE schemes are still not being put into the practical applications due to their low efficiency. Therefore, it is imperative to find a more efficient FHE scheme or to optimize the existing FHE schemes so that they can be put into the practical applications. In this paper, we optimize GSW scheme by using the parallel computing, and finally we get a high-performance FHE scheme, namely PGSW scheme. Experimental results show that the time overhead of the homomorphic operations in new FHE scheme will be reduced manyfold with the increasing of processing units number. Therefore, our scheme can greatly reduce the running time of homomorphic operations and improve the performance of FHE scheme through sacrificing hardware resources. It can be seen that our FHE scheme can catalyze the development of FHE.

UHF와 PSTN간 단대단 디지털 음성보안통신 (End-to-End Digital Secure Speech Communication over UHF and PSTN)

  • 김기홍
    • 한국산학기술학회논문지
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    • 제13권5호
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    • pp.2313-2318
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    • 2012
  • 전술무선통신망의 급격한 증가로 이기종망간 단대단 음성보안통신은 매우 중요한 보안이슈가 되어왔다. 일반적으로 고비도의 단대단 음성보안통신은 사용자 통신단말에 고비도의 암호알고리즘을 적용함으로써 가능하나, 이는 이기종망간 암호화된 데이터를 직접 전송할 수 없는 문제점을 필수적으로 야기시킨다. 다시 말해, 서로 다른 전술통신망 사이에 위치하는 망연동 게이트웨이에서 암호화 데이터에 대한 복호화 및 재암호화와 같은 부가절차가 필연적으로 요구된다. 본 논문에서는 이기종 전술통신환경에서 게이트웨이에서의 복호화 및 재암호화에 따른 문제점을 해결하고, 최적의 단대단 음성보안체계를 수립하기 위해 UHF와 PSTN 통신망간 단대단 음성보안통신 메커니즘을 제안하고 기존 메커니즘 대비 제안 메커니즘의 성능을 비교, 분석한다. 제안된 메커니즘은 망연동 게이트웨이에서의 복호화 및 재암호화에 따른 부가지연이 전혀 없고, 이기종망간 우수한 연동특성을 가진다.

High Performance Integer Multiplier on FPGA with Radix-4 Number Theoretic Transform

  • Chang, Boon-Chiao;Lee, Wai-Kong;Goi, Bok-Min;Hwang, Seong Oun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제16권8호
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    • pp.2816-2830
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    • 2022
  • Number Theoretic Transform (NTT) is a method to design efficient multiplier for large integer multiplication, which is widely used in cryptography and scientific computation. On top of that, it has also received wide attention from the research community to design efficient hardware architecture for large size RSA, fully homomorphic encryption, and lattice-based cryptography. Existing NTT hardware architecture reported in the literature are mainly designed based on radix-2 NTT, due to its small area consumption. However, NTT with larger radix (e.g., radix-4) may achieve faster speed performance in the expense of larger hardware resources. In this paper, we present the performance evaluation on NTT architecture in terms of hardware resource consumption and the latency, based on the proposed radix-2 and radix-4 technique. Our experimental results show that the 16-point radix-4 architecture is 2× faster than radix-2 architecture in expense of approximately 4× additional hardware. The proposed architecture can be extended to support the large integer multiplication in cryptography applications (e.g., RSA). The experimental results show that the proposed 3072-bit multiplier outperformed the best 3k-multiplier from Chen et al. [16] by 3.06%, but it also costs about 40% more LUTs and 77.8% more DSPs resources.

Efficient Image Chaotic Encryption Algorithm with No Propagation Error

  • Awad, Abir;Awad, Dounia
    • ETRI Journal
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    • 제32권5호
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    • pp.774-783
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    • 2010
  • Many chaos-based encryption methods have been presented and discussed in the last two decades, but very few of them are suitable to secure transmission on noisy channels or respect the standard of the National Institute of Standards and Technology (NIST). This paper tackles the problem and presents a novel chaos-based cryptosystem for secure transmitted images. The proposed cryptosystem overcomes the drawbacks of existing chaotic algorithms such as the Socek, Xiang, Yang, and Wong methods. It takes advantage of the increasingly complex behavior of perturbed chaotic signals. The perturbing orbit technique improves the dynamic statistical properties of generated chaotic sequences, permits the proposed algorithm reaching higher performance, and avoids the problem of error propagation. Finally, many standard tools, such as NIST tests, are used to quantify the security level of the proposed cryptosystem, and experimental results prove that the suggested cryptosystem has a high security level, lower correlation coefficients, and improved entropy.

Improving Security in Ciphertext-Policy Attribute-Based Encryption with Hidden Access Policy and Testing

  • Yin, Hongjian;Zhang, Leyou;Cui, Yilei
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제13권5호
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    • pp.2768-2780
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    • 2019
  • Ciphertext-policy attribute-based encryption (CP-ABE) is one of the practical technologies to share data over cloud since it can protect data confidentiality and support fine-grained access control on the encrypted data. However, most of the previous schemes only focus on data confidentiality without considering data receiver privacy preserving. Recently, Li et al.(in TIIS, 10(7), 2016.7) proposed a CP-ABE with hidden access policy and testing, where they declare their scheme achieves privacy preserving for the encryptor and decryptor, and also has high decryption efficiency. Unfortunately, in this paper, we show that their scheme fails to achieve hidden access policy at first. It means that any adversary can obtain access policy information by a simple decisional Diffie-Hellman test (DDH-test) attack. Then we give a method to overcome this shortcoming. Security and performance analyses show that the proposed scheme not only achieves the privacy protection for users, but also has higher efficiency than the original one.

고기능 RFID 태그를 위한 보안 프로토콜 (A Secure Protocol for High-Performance RFID Tag)

  • 박진성;최명열
    • 전기학회논문지P
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    • 제54권4호
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    • pp.217-223
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    • 2005
  • In this paper, we have proposed a secure dynamic ID allocation protocol using mutual authentication on the RFID tag. Currently, there are many security protocols focused on the low-price RFID tag. The conventional low-price tags have limitation of computing power and rewritability of memory. The proposed secure dynamic ID allocation protocol targets to the high-performance RFID tags which have more powerful performance than conventional low-price tag by allocating a dynamic ID to RFID using mutual authentication based on symmetric encryption algorithm. This protocol can be used as a partial solution for ID tracing and forgery.