• 대한전자공학회논문지TC
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• 제48권2호
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• pp.90-94
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• 2011

본 논문에서는 고주파 대역 중에서 에너지 전송과 관련되어 정류 회로의 구조와 특성을 분석하고, 최대의 효율을 이끌어 낼 수 있는 방안을 찾고자 한다. 13.56MHz에서의 입력 신호를 DC 변환하여 실험 및 측정을 하였다. 정류회로는 반파 정류회로, 전파정류회로 브릿지 정류회로로 나눌 수 있고, 최대 효율을 갖기 위해서 다양한 정류 회로를 전산 모의 실험하였다. 현재까지의 연구 내용은 passive 소자를 이용한 효율 개선에 중점을 두고 실험을 하였다. 정류 효율에 영향을 미치는 요소는 소자의 특성에 좌우하며, 이번 실험에서는 약 70%의 효율을 측정할 수 있었으며, 보다 개선된 소자를 사용함으로서 낮은 입력에서 높은 효율을 얻을 수 있었다.

• Journal of electromagnetic engineering and science
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• 제14권1호
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• pp.25-30
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• 2014

This paper discusses the design of a high frequency Greinacher voltage multiplier as rectifier; it has a greater conversion efficiency and higher output direct current (DC) voltage at high power compared to a simple halfwave rectifier. Multiple diodes in the Greinacher voltage multiplier with distributed circuits consume excited power to the rectifier equally, thereby increasing the overall power capacity of the rectifier system. The proposed rectifiers are a Greinacher voltage doubler and a Greinacher voltage quadrupler, which consist of only diodes and distributed circuits for high frequency applications. For each rectifier, the RF-to-DC conversion efficiency and output DC voltage for each input power and load resistance are analyzed for the maximum conversion efficiency. The input power with maximum conversion efficiency of the designed Greinacher voltage doubler and quadrupler is 3 and 7 dB higher, respectively;than that of the halfwave rectifier.

• Journal of Power Electronics
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• 제16권1호
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• pp.121-132
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• 2016

In this paper, high-efficiency design methodology of a zero-voltage-switching full-bridge (ZVS-FB) pulse width modulation (PWM) converter for server-computer power supply is discussed based on self-driven synchronous rectifier (SR) performance. The design approach focuses on rectifier conduction loss on the secondary side because of high output current application. Various-number parallel-connected SRs are evaluated to reduce high conduction loss. For this approach, the reliability of gate control signals produced from a self-driver is analyzed in detail to determine whether the converter achieves high efficiency. A laboratory prototype that operates at 80 kHz and rated 1 kW/12 V is built for various-number parallel combination of SRs to verify the proposed theoretical analysis and evaluations. Measurement results show that the best efficiency of the converter is 95.16%.

• 조명전기설비학회논문지
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• 제21권4호
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• pp.61-72
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• 2007

This study proposed a high efficiency DC-DC converter with a new current doubler rectifier for fuel-cell systems for use with the Nexa(310-0027) PEMFC from the Ballard Co. The proposed high efficiency DC-DC converter for the fuel-cell system generated ZVS by applying partial resonance and using a phase shift PWM control method. Constantly switching frequency, loss of switching, peak current, and peak voltage were reduced by this system. In addition to this system, two inductors were attached to a rectifier circuit allowing it to be able to provide the direct current(DC) and DC voltage safely to a load with reduced ripple components. Also, by using the newly proposed current doubler rectifier, the high frequency DC-DC converter for the fuel cell system was capable of reaching a highest efficiency of 92[%] as compared to 88.3[%] efficiency in previous results, which means that efficiency increased 3.7[%]. The overall results were confirmed by a simulation and laboratory experiment.

• IEIE Transactions on Smart Processing and Computing
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• 제3권6호
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• pp.410-415
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• 2014

This paper presents a new rectifier with a bootstrapping technique to reduce the effective drop voltage. An all-digital delay locked loop (ADDLL) circuit was also applied to prevent the reverse leakage current. The proposed rectifier uses NMOS diode connected instead of PMOS to reduce the design size and improve the frequency respond. All the sub-circuits of ADDLL were designed with low power consumption to reduce the total power of the rectifier. The rectifier was implemented in CMOS $0.35{\mu}m$ technology. The peak power conversion efficiency was 76 % at an input frequency of 6.78MHz and a power level of 5W.

• Journal of Power Electronics
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• 제18권2호
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• pp.323-331
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• 2018

Buck power factor correction (PFC) converters, compared with conventional boost PFC converters, exhibit high efficiency performance in the entire range of universal line voltage. This feature has gotten more attention for eliminating the zero crossing dead angle of buck PFC rectifiers. Furthermore, bridgeless structures for the reduction of conduction losses have been proposed. The aim of this paper is to introduce a single-phase buck rectifier that simultaneously has unity power factor (PF) and bridgeless structure while operating in the continuous conduction mode (CCM). For this purpose, two auxiliary flyback converters without any active switches are applied to a bridgeless buck rectifier to eliminate the zero crossing dead angle and achieve unity power factor, low total harmonic distortion (THD) and high efficiency. The operation and design considerations of the proposed rectifier are verified on a 150W, 48V prototype using a conventional peak-current-mode control. The measurement results show that the proposed rectifier has nearly unity power factor, THD less than 7% and high efficiency.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.2016-2019
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• 1997

To solve the low efficiency problem of low-voltage power supplies, it has been studied to replace the schottky barrier diode with the MOSFET synchronous rectifier. In this paper, Phase Shift-Controlled Clamp Mode Zero Voltage Switching-Multi Resonant Converter with Synchronous Rectifier (PSC CM ZVS-MRC with SR) is presented to achieve high efficiency in low-voltage power supplies. The characteristics analysis of synchronous rectifier is established by using the MOSFET equivalent circuit and efficiency comparison is established between the Synchronous Rectifier and the schottky barrier diode. To verify the validity of the analysis, 33W(3.3V, 10A) PSC CM ZVS-MRC with self-driven synchronous rectifier at switching frequency of 1MHz is designed and tested. And it is confirmed that the experimental results are well consistent with the theoretical results. The maximum efficiency of the converter is 83.4% at full load, which is 3.3% higher than conventional schottky diode rectification.

• 전력전자학회논문지
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• 제20권1호
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• pp.65-71
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• 2015

This paper presents the efficiency analysis of a critical current mode interleaved PFC rectifier, in which each of three different semiconductor switches is employed as the active switch. The Si FET, SiC FET, and GaN FET are consecutively used with the prototype PFC rectifier, and the efficiency of the PFC rectifier with each different semiconductor switch is analyzed. An equivalent circuit model of the PFC rectifier, which incorporates all the internal losses of the PFC rectifier, is developed. The rms values of the current waveforms main circuit components are calculated. By adapting the rms current waveforms to the equivalent model, all the losses are broken down and individually analyzed to assess the conduction loss, switching loss, and magnetic loss in the PFC rectifier. This study revealed that the GaN FET offers the highest overall efficiency with the least loss among the three switching devices. The GaN FET yields 96% efficiency at 90 V input and 97.6% efficiency at 240 V, under full load condition. This paper also confirmed that the efficiency of the three switching devices largely depends on the turn-on resistance and parasitic capacitance of the respective switching devices.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권3호
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• pp.319-325
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• 2015

This paper presents an efficient vibration energy harvester with a piezoelectric (PE) cantilever. The proposed PE energy harvester increases the efficiency through minimization of hardware complexity and hence reduction of power dissipation of the circuit. Two key features of the proposed energy harvester are (i) incorporation synchronized switches with a simple control circuit, and (ii) a feed-forward buck converter with a simple control circuit. The chip was fabricated in $0.18{\mu}m$ CMOS processing technology, and the measured results indicate that the proposed rectifier achieves the efficiency of 77%. The core area of the chip is 0.2 mm2.

• 전력전자학회논문지
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• 제20권3호
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• pp.280-289
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• 2015

A high-efficiency full-bridge DC-DC converter with a current-doubler rectifier and an asymmetric pulse-width modulation is proposed. Through the asymmetric pulse-width modulation, the proposed converter achieves zero-voltage switching of power switches without the circulating currents. The proposed converter reduces the output current ripple through the current-doubler rectifier. A control strategy is suggested for the proposed converter to charge battery banks. A constant current and constant voltage charging is performed. The proposed converter achieved a higher efficiency compared with the conventional full-bridge DC-DC converter with a phase-shift modulation. The performance of the proposed converter is evaluated by the experimental results for a 1.0 kW prototype circuit.