• Journal of the Korea Society of Computer and Information
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• v.22 no.10
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• pp.47-54
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• 2017

In this paper, we propose a connected car platform architecture called Mobile Second for developing of verity convergence services. A Mobile Second platform architecture is designed to provide more powerful and diverse convergence services for vehicles and drivers by applying technologies of Connected Car and ICT Convergence in various ways. The Mobile Second platform is implemented by applying Tizen IVI and Android to hardware platforms for IVI, Nexcom's VTC1010 and Freescale's i.MX6q/dl respectively. The Mobile Second platform provides the driver with the vehicle's information via IVI devices, mobile devices and PCs, etc., and provides Vehicle Selective Gateway(VSG) and Vehicle Control Framework for the driver to control his/her vehicle, and also provides a web framework to enable the use of VSG's APIs for the monitoring and controlling the vehicle information in various mobile environments as well as IVI devices. Since the Mobile Second platform aims to create new variety of services for Connected Car, it includes service frameworks for Smart Care / Self diagonostics, Mood & Entertainment services, and Runtime, libraries and APIs needed for the development of related applications. The libraries given by the Mobile Second Platform provides both a native library for native application support and a Java Script-based library for web application support, minimizing the dependency on the platform and contributing the convenience of developers at the same time.

• Proceedings of the KIEE Conference
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• 2006.10d
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• pp.166-168
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• 2006

This paper presents a speed control of AC servo system using LabVIEW program and cRIO (Compact RIO)hardware which is a real-time controller made in National Instruments company. LabVIEW is a GUI programming language easy to implement control system and cRIO is a reconfigurable hardware platform which is very simple. Therefore Lab VIEW and cRIO will be excellent tools to design and implement control system.

• Journal of Korea Multimedia Society
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• v.17 no.3
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• pp.324-332
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• 2014

This paper presents a programmable System-On-a-chip for various embedded applications that need Neural Network computations. The system is fully implemented into Field-Programmable Gate Array (FPGA) based prototyping platform. The SoC consists of an embedded processor core and a reconfigurable hardware accelerator for neural computations. The performance of the SoC is evaluated using real image processing applications, such as optical character recognition (OCR) system.

• Journal of Korea Society of Industrial Information Systems
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• v.14 no.2
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• pp.72-80
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• 2009

In this parer, we propose a hardware abstraction architecture(HAA) for low cost flash memories that can be applicable to wireless sensor nodes. The proposed HAA consists of three layers. The three layers are 1) HHL(Hardware Interlace Layer), HAL(Hardware Adaption Layer), and HPL(Hardware Presentation Layer), where HIL provides a platform independent interlace to applications of upper layers, HAL performs hardware resource management, program status control, and generation of logical instructions as main core of the HAA, and HPL initializes hardware and communicates data between MCU and flash memory. We implemented our HAA on AT45DB flash memory, and the HAA used 4,384 bytes program memory and 195 bytes data memory respectively. Since the proposed HAA is composed of well defined three layers and shows a low utilization of memory, it can provides a high efficiency in terms of flexibility, scalability, and re-usability, and thus the HAA is well suited for wireless sensor nodes.

• 전자공학회논문지 IE
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• v.43 no.4
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• pp.136-142
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• 2006

As the function and interface for controlling the robot is more complicated, the robot platform which can link effectively between software and hardware is need to develop the robot easily. In this paper, we developed a humanoid robot that interests in robot industry part for robot platform with network communication function.

• Proceedings of the KSR Conference
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• 2007.11a
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• pp.1616-1625
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• 2007

Recently, embedded systems role as control systems instead of mechanical control systems in many parts of vehicles. In cases that embedded systems are used controling the electric signal, it is important to secure the reliability of a software within embedded systems. In this paper, the test platform for securing the reliability and real-time characteristic of the embedded system that controls electric signal of All Wheel Steering Control System in a Bi-modal tram is proposed. The platform is built on a HIL (Hardware In the Loop) architecture. Through the HIL platform, various vehicle conditions, driver activities and environment conditions can be successfully tested without actual driving, hence improving the reliability of the embedded system for the All Wheel Steering Control System.

• Journal of Energy Engineering
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• v.13 no.3
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• pp.199-204
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• 2004

This Paper deals with a Platform for diagnosis monitoring of DC-DC converter system based on Java virtual machine. This platform is designed for estimating diagnostic parameters of DC-DC converter system based on system identification method and displaying Web-page on operating status. For Web-service, hardware of platform is baled on a Strongarm processor and software bale is designed on Linux and java virtual machine.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.3
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• pp.301-306
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• 2008

Drivers are becoming more fatigued and uncomfortable with increase in traffic density, and this condition can lead to slower reaction time. Consequently, they may face the danger of traffic accidents due to their inability to cope with frequent gear shifting. To reduce this risk, some drivers prefer automatic transmission (AT) over manual transmission (MT). The AT offers more superior drivability and less shifting shock than the MT; therefore, the AT market share has been increasing. The AT is controlled by an electronic control unit (ECU), which provides better shifting performance. The transmission control unit (TCU) is a higher-value-added product, so the companies that have advanced technologies end to evade technology transfer. With more cars gradually using the ECU, the TCU is expected to be faster and more efficient for organic communication and arithmetic processing between the control systems than the l6-bit controller. In this paper, the model of an automatic transmission vehicle using MATLAB/Simulink is developed for the Hardware in-the-Loop (HIL) simulation with a 32-bit embedded system, and also the AT control logic for shifting is developed by using MATLAB/Simulink. The developed AT control logic, transformed automatically by real time workshop toolbox, is loaded to a 32-bit embedded system platform based on Freescale's MPC565. With both vehicle model and 32-bit embedded system platform, we make the HIL simulation system and HIL simulation of AT based on real time operating system (RTOS) is performed. According to the simulation results, the developed HIL simulator will be used for the performance test of embedded system for AT with low cost and effort.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• v.1
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• pp.221-226
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• 2006

Around 2002, the United States Coast Guard (USCG) identified a need to re-capitalize their Reference Station (RS) and Integrity Monitor (IM) equipment used in the Nationwide Differential Global Position System (NDGPS). Commercially available off-the-shelf differential RS and IM equipment lacked the open architecture required to support long-term goals that include future system improvements such as use of new civil frequencies on L2 and L5 and realization of a higher rate NDGPS beacon data channel intended to support RTK. The first step in preparing for this future NDGPS was to port current RTCM SC-104 compatible RS and IM functionality onto an open architecture PC-based platform. Trimble's product Charisma is a PC-based RS and IM software designed to meet these USCG goals. In fact USCG engineers provided key designs and design insights throughout the development. We cannot overstate the contribution of the USCG engineers. Fundamental requirements for this effort were that it be sufficiently flexible in hardware and software design to support fluid growth and exploitation of new signals and technologies as they become available, yet remain backward compatible with legacy user receivers and existing site hardware and system architecture. These fundamental goals placed an implicit adaptability requirement on the design of the replacement RS and IM. Additionally, project engineers were to remain focused on sustaining the high level of differential GPS service that 1.5 million legacy users have come to depend on. This paper will present new hardware and software (i.e., Trimble's Charisma software) architecture for the next generation NDGPS RS and IM. This innovative approach to engineering on an open architecture PC-based platform allows the system to continue to fulfill legacy NDGPS system requirements and allows the USCG and others to pursue a scalable hardware re-capitalization strategy. We will use the USCG's recapitalization project to explain the essential role of the Charisma software.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.4
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• pp.508-514
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• 2020

To implement the continuously evolving mobile communication standards such as Long Term Evolution (LTE) and 5G, the Software Defined Radio (SDR) concept provides great flexibility and efficiency. For many years, a high-end Digital Signal Processor (DSP) System on Chip (SoC) has been developed to support multicore and various hardware coprocessors. This paper introduces the implementation of the SDR platform hardware using TI's TCI663x chip. Using the platform, LTE transport channel is implemented by interworking multicore DSP with Bit rate Coprocessor (BCP) and Turbo Decoder Coprocessor (TCP) and the performance is evaluated according to various implementation options. In order to evaluate the performance of the implemented LTE transport channel, LTE base station system was constructed by combining FPGA main board for physical channels, SDR platform board, and RF & Antenna board.