• Journal of the Korea Computer Graphics Society
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• v.8 no.3
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• pp.1-7
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• 2002

This paper presents a practical technique for approximating the boundary surface of the volume swept out by three-dimensional objects using the depth-buffer. Objects may change their geometries and orientations while sweeping. The sweep volume is approximated as a union of volume elements, which are just rendered inside appropriate viewing frusta of virtual cameras and mapped into screen viewports with depth-buffer. From the depth of each pixel in the screen space of each rendering, the corresponding point in the original world space can be computed. Appropriately connecting these points yields polygonal faces forming polygonal surface patches approximately covering some portion of the sweep volume. Each view frustum adds one or more surface patches in this way, and these presumably overlapped polygonal surface patches approximately enclose the whole sweep volume. These patches may further be processed to yield non-overlapped polygonal surfaces as an approximation to the boundary of the original 3D sweep volume.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.269-272
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• 1987

This paper is concerned on kinematic analysis and simulation of an automatic feeding mechanism subjected by the motion of a curvilinear inverse cam. The main objection is the development of computer-aided design (CAD) program for simulating the motion of the cam-feeding mechanism using computer-graphics. A computer program CACAFS (Computer-Aided Cam and Automatic Feeding System) is independent of computer hardware used. The program is also interactive using a menu-selection technique. As the second part of the paper for the motion simulation of the cam-feeding system, this paper discusses the state-of-art for CAD. The first part of the paper presents the algorithm to simulate the notion of the cam-feeding mechanism.

• Journal of the Korea Society of Computer and Information
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• v.18 no.1
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• pp.185-192
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• 2013

The development of hardware, popularization of 3D graphics software could get to easily use 3d graphics tool in the school. And learning difficulties of a shape section increased through more being enforced a shape section of an elementary school. Thus we try to improve learning effectiveness in a shape section using Sketech Up software. To do this, we analyzed existing studies, classified 3D graphics software, provided the selection criteria of vector graphics software. And we explained how to select 3D graphics software. We selected and reorganized the shape contents to use Sketch Up, which make and rotate 3D figures, understand aspects of a shape. And we inserted the content about piling 3D figures in the beginning state of the curriculum. we composed 10 periods and practiced our reorganized curriculum to the teaching and learning using Sketch Up. And we conducted before & after survey to check out t-verified. And we acquired meaningful results statistically. Thus applying Sketch Up to the shape learning can be analyzed effectively.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.12
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• pp.723-731
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• 2005

The $4{\times}4$ homogeneous transformation matrix is a compact representation of orientation and position of an object in robotics and computer graphics. A coordinate transformation is accomplished through the successive multiplications of homogeneous matrices, each of which represents the orientation and position of each corresponding link. Thus, for real time control applications in robotics or animation in computer graphics, the fast multiplication of homogeneous matrices is quite demanding. In this paper, a parallel-architecture vector processor is designed for this purpose. The processor has several key features. For the accuracy of computation for real application, the operands of the processors are floating point numbers based on the IEEE Standard 754. For the parallelism and reduction of hardware redundancy, the processor takes column vectors of homogeneous matrices as multiplication unit. To further improve the throughput, the processor structure and its control is based on a pipe-lined structure. Since the designed processor can be used as a special purpose coprocessor in robotics and computer graphics, additionally to special matrix/matrix or matrix/vector multiplication, several other useful instructions for various transformation algorithms are included for wide application of the new design. The suggested instruction set will serve as standard in future processor design for Robotics and Computer Graphics. The design is verified using FPGA implementation. Also a comparative performance improvement of the proposed design is studied compared to a uni-processor approach for possibilities of its real time application.

• Journal of Korea Multimedia Society
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• v.11 no.8
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• pp.1160-1168
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• 2008

Recent technological innovations of mobile hardware which make it possible to implement real-time 3D rendering effects under mobile environment have provided a potential to develop realistic mobile application programs. This paper presents platform independent, OpenGL ES based, real-time mobile rendering libraries, called DMGL for supporting high quality 3D rendering on handhold devices. The libraries allows the programmers who develops mobile graphics softwares to generate varying advanced real-time 3D graphics effects without great effort. Moreover, GPGPU-based libraries give a set of functions to solve complex equations for simulating natural phenomena such as smoke and fire, and to render the results in real-time.

• Proceedings of the Korean Information Science Society Conference
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• 2006.06a
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• pp.226-228
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• 2006

In this paper we describe a simulation and development framework for designing mobile 3D graphics architectures. We are developing a simple and flexible simulation and verification environment (SVE) that uses gITrace's ability to intercept and redirect an OpenGL/ES streams. In combination wlth gITrace to trace OpenGL/ES commands, the SVE simulates the behavior of mobile 3D graphics pipeline during playback of traces, and then produces the second geometry trace that can be used as a test vector for the Verilog/HDL RT-level model. By comparing the frame-by-frame results, we can conduct architectural verification. To demonstrate the functionality of the SVE, we show the implementation of the verified mobile 3D architecture on a FPGA board. For this, we also present an application development environment (ADE) includes a mobile graphics API and a device driver interface (DDI). The proposed two software environments, the SVE and the ADE could be used fer developing and testing mobile applications, architectural study and speculative hardware designs.

• Journal of the Korean Institute of Intelligent Systems
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• v.19 no.3
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• pp.444-449
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• 2009

With the advance of high performance computing hardware, many applications have been emerging which exploit real-time computer graphics capabilities. This paper is concerned with an effective realization method for reflection effect for the situations in which moving pictures are played in 3D computer graphics modeling world. The method determines in an geometric way the locations of the projection plan into which the playing areas of moving pictures are mapped, and then realizes the reflection effect with texture mapping. Compared with the traditional stencil buffer-based reflection method, the processing time of the proposed method does not significantly deteriorate for the models with moving pictures and reflection surfaces, and its throughput was improved by 30% at minimum and 127% at maximum for the models used in the comparative studies.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.2
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• pp.65-70
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• 2015

In this paper, we describe the world's first real-time ray-tracing chip architecture. Ray-tracing technology generates high-quality 3D graphics images better than current rasterization technology by providing four essential light effects: shadow, reflection, refraction and transmission. The real-time ray-tracing chip named RayChip includes a real-time ray-tracing graphics processing unit and an accelerating tree-building unit. An ARM Ltd. central processing unit (CPU) and other peripherals are also included to support all processes of 3D graphics applications. Using the accelerating tree-building unit named RayTree to minimize the CPU load, the chip uses a low-end CPU and decreases both silicon area and power consumption. The evaluation results with RayChip show appropriate performance to support real-time ray tracing in high-definition (HD) resolution, while the rendered images are scaled to full HD resolution. The chip also integrates the Linux operating system and the familiar OpenGL for Embedded Systems application programming interface for easy application development.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.3
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• pp.1058-1070
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• 2014

There are two major ways to implement depth estimation, multiple image depth estimation and single image depth estimation, respectively. The former has a high hardware cost because it uses multiple cameras but it has a simple software algorithm. Conversely, the latter has a low hardware cost but the software algorithm is complex. One of the recent trends in this field is to make a system compact, or even portable, and to simplify the optical elements to be attached to the conventional camera. In this paper, we present an implementation of depth estimation with a single image using a graphics processing unit (GPU) in a desktop PC, and achieve real-time application via our evolutional algorithm and parallel processing technique, employing a compute shader. The methods greatly accelerate the compute-intensive implementation of depth estimation with a single view image from 0.003 frames per second (fps) (implemented in MATLAB) to 53 fps, which is almost twice the real-time standard of 30 fps. In the previous literature, to the best of our knowledge, no paper discusses the optimization of depth estimation using a single image, and the frame rate of our final result is better than that of previous studies using multiple images, whose frame rate is about 20fps.

• Journal of Information Processing Systems
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• v.5 no.2
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• pp.105-116
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• 2009

To solve the general problems surrounding the application of genetic algorithms in stereo matching, two measures are proposed. Firstly, the strategy of simplified population-based incremental learning (PBIL) is adopted to reduce the problems with memory consumption and search inefficiency, and a scheme for controlling the distance of neighbors for disparity smoothness is inserted to obtain a wide-area consistency of disparities. In addition, an alternative version of the proposed algorithm, without the use of a probability vector, is also presented for simpler set-ups. Secondly, programmable graphics-hardware (GPU) consists of multiple multi-processors and has a powerful parallelism which can perform operations in parallel at low cost. Therefore, in order to decrease the running time further, a model of the proposed algorithm, which can be run on programmable graphics-hardware (GPU), is presented for the first time. The algorithms are implemented on the CPU as well as on the GPU and are evaluated by experiments. The experimental results show that the proposed algorithm offers better performance than traditional BMA methods with a deliberate relaxation and its modified version in terms of both running speed and stability. The comparison of computation times for the algorithm both on the GPU and the CPU shows that the former has more speed-up than the latter, the bigger the image size is.