• Title/Summary/Keyword: gate oxide

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Surface treatment effects on organic thin film transistors (유기박막트랜지스터의 표면처리 효과)

  • 임상철;김성현;김미경;정태형;이정헌;김도진
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.03a
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    • pp.126-126
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    • 2003
  • 유기트랜지스터에 관한 연구는 1980년 이후부터 시작되었으나 근래에 들어 전 세계적으로 본격적인 연구가 진행되고 있다. 제작공정이 간단하고 비용이 저렴하며 충격에 의해 깨지지 않고 구부리거나 접을 수 있는 전자 회로 기판이 미래의 산업에 필수적인 요소가 될 것으로 예상되고 있으며 이러한 요구를 충족시킬 수 있는 유기트랜지스터의 개발은 아주 중요한 연구분야로 대두되고 있다. 본 연구에서는 표면처리에 따른 contact angle, I-V 특성곡선, 표면 morphology 등의 결과로부터 dry cleaning 한 것이 wet cleaning한 것보다 왜 좋은지를 논하고자 한다. 먼저 N-type SiO$_2$ 기판을 이용하여 back면의 oxide층을 제거한 후, back gate용으로 사용하기 위하여 sputtering장치로 Au/Cr을 증차하였다. 그리고 기판에 앞면을 photolithography 공정을 이용하여 Au/Cr를 1000$\AA$ 증착 하여 source-, drain-eldctrode를 제조하였다. 그리고 SiO$_2$ 기판의 표면처리를 달리하여 그 위에 유기박막을 증착하여 특성을 비교하였다.

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Fuzzy-based Field-programmable Gate Array Implementation of a Power Quality Enhancement Strategy for ac-ac Converters

  • Radhakrishnan, N.;Ramaswamy, M.
    • Journal of Electrical Engineering and Technology
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    • v.6 no.2
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    • pp.233-238
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    • 2011
  • In the present work, a new approach is proposed for via interconnects of semiconductor devices, where multi-wall carbon nanotubes (MWCNTs) are used instead of conventional metals. In order to implement a selective growth of carbon nanotubes (CNTs) for via interconnect, the buried catalyst method is selected which is the most compatible with semiconductor processes. The cobalt catalyst for CNT growth is pre-deposited before via hole patterning, and to achieve the via etch stop on the thin catalyst layer (ca. 3nm), a novel 2-step etch scheme is designed; the first step is a conventional oxide etch while the second step chemically etches the silicon nitride layer to lower the damage of the catalyst layer. The results show that the 2-step etch scheme is a feasible candidate for the realization of CNT interconnects in conventional semiconductor devices.

Improvement of Thin-Gate Oxide using Nitridation and Reoxidation (질화와 재산화를 이용한 얇은 게이트 산화막의 질적 향상)

  • 이정석;장창덕;이용재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.11a
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    • pp.1-4
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    • 1998
  • In this paper, we have studied a variation of I-V characteristics, and time-dependent dielectric breakdown(TDDB) of thin layer NO and ONO film depending on nitridation and reoxidation time, respectively, and measured a variation of leakage current and charge-to-breakdown(Q$\_$bd/) of optimized NO and ONO film depending on ambient temperature, and then compared with the properties of conventional SiO$_2$. From the results, we find that these NO and ONO thin films are strongly influenced by process time and the optimized ONO film shows superior dielectric characteristics, and Q$\_$bd/ performance over the NO film and SiO$_2$, while maintaining a similar electric field dependence compared with NO layer.

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Forming of Compressor Piston Part of Metal Matrix Composites by Thixoforming Process (Thixoforming을 응용한 금속복합재료의 콤푸레서용 피스톤 제품의 성형)

  • 이동건;강충길
    • Transactions of Materials Processing
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    • v.10 no.3
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    • pp.223-234
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    • 2001
  • The characteristics of thixoforming process can decrease liquid segregation because of the improvement in fluidity in a globular microstructure state and utilizes flow without an air entrapment. Therefore, in order to obtain the sound parts of metal matrix composites by using thixoforming process which has co-existing solidus-liquidus phase, it is very important to design a die shape property and to obtain the fabrication conditions which affect the unifomity of the solid fraction on unfilling state and various defects throughout the fabricated parts. The die designs and fabrication conditions to obtain the good piston part are proposed for thixoforging process of metal matrix composites. When reheated metal matrix composites billets were transferred to the closed die gate, thixoforging were carried out under the various pressure(60, 80, 100MPa) with controled forging speed. The mechanical properties such as hardness and tensile strength for thixoforged parts have been investigated after T6 heat treatment.

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Fabrication and Its Biomedical Application of the pH-ISFET Microprobe (pH-ISFET 마이크로프로브의 製作과 그 生醫學的 應用)

  • Lee, Kwang-Man;Sohn, Byung-Ki
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.11
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    • pp.1335-1341
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    • 1988
  • A pH-ISEFET microprobe for in vivo measurements has been fabricated by combining ISFET (SL-IIS) chip and capillary thin film reference electrode. A two-step TCE oxidation for the gate oxide layer and multilayer encapsulation using silicone rubber and epoxy were specially used for the improvement of the stability and temperature dependence of the ISFET's. The measured sensitivit, response time and temperature dependence of the pH-ISFET microprobes are 50 mV/pH, less than one second, and - 0.01 pH/$^{\circ}$ , respectively. By operating continuously more than 40 days, a long term stability of 0.016 pH/day is obtained. The result of pH monitoring of femoral arterial blood in a rabbit is fairly good agreement with the value of blood gas analysis.

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Hot Carrier Reliability of Short Channel ($L=1.5{\mu}m$) P-type Low Temperature poly-Si TFT

  • Choi, Sung-Hwan;Shin, Hee-Sun;Lee, Won-Kyu;Kuk, Seung-Hee;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.239-242
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    • 2008
  • We have investigated the reliability of short channel ($L=1.5{\mu}m$) p-type ELA poly-Si TFTs under hot carrier stress. Threshold voltage of short channel TFT was significantly more shifted to positive direction than that of long channel TFT under the same stress. This result may be attributed to electron trapping at the interface between poly-Si film and gate oxide layer.

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Oxide Thickness Dependent Drain Induced Barrier Lowering of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 드레인 유도 장벽 감소현상의 산화막 두께 의존성)

  • Jung, Hakkee;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.821-823
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    • 2015
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 상하단 게이트 산화막 두께에 대한 드레인 유도 장벽 감소 현상에 대하여 분석하고자한다. 드레인 유도 장벽 감소 현상은 단채널 MOSFET에서 드레인전압에 의하여 소스측 전위장벽이 낮아지는 효과를 정량화하여 표현한다. 소스 측 전위장벽이 낮아지면 결국 문턱전압에 영향을 미치므로 드레인전압에 따른 문턱전압의 변화를 관찰할 것이다. 비대칭 이중게이트 MOSFET는 상단과 하단의 게이트 산화막 두께를 다르게 제작할 수 있는 특징이 있다. 그러므로 본 연구에서는 상단과 하단의 게이트 산화막 두께변화에 따른 드레인 유도 장벽 감소 현상을 포아송방정식의 해석학적 전위분포를 이용하여 분석하였다. 결과적으로 드레인 유도 장벽 감소 현상은 상하단 게이트 산화막 두께에 따라 큰 변화를 나타냈다. 또한 도핑농도에 따라 드레인유도장벽감소 현상이 큰 영향을 받고 있다는 것을 알 수 있었다.

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Dependence of Self-heating Effect on Width/Length Dimension in p-type Polycrystalline Silicon Thin Film Transistors

  • Lee, Seok-Woo;Kim, Young-Joo;Park, Soo-Jeong;Kang, Ho-Chul;Kim, Chang-Yeon;Kim, Chang-Dong;Chung, In-Jae
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.505-508
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    • 2006
  • Self-heating induced device degradation and its width/length (W/L) dimension dependence were studied in p-type polycrystalline silicon (poly-Si) thin film transistors (TFTs). Negative channel conductance was observed under high power region of output curve, which was mainly caused by hole trapping into gate oxide and also by trap state generation by self-heating effect. Self-heating effect became aggravated as W/L ratio was increased, which was understood by the differences in heat dissipation capability. By reducing applied power density normalized to TFT area, self-heating induced degradation could be reduced.

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The characteristics of Organic Thin Film Transistors with high-k dielectrics

  • Kim, Chang-Su;Kim, Woo-Jin;Jo, Sung-Jin;Baik, Hong-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1288-1290
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    • 2005
  • We report on the structural and electrical properties of amorphous Yttria-stabilized zirconia (YSZ) thin films which are the potential high-k gate dielectric material of organic thin film transistor (OTFT). To investigate the influence of the oxygen flow rate on the structural and electrical properties of the YSZ films, XRD, XPS, J-E, I-V were carried out in this work. Oxygen vacancies are expected to be the most predominant type of defect in metal-oxide dielectrics. The leakage current density decreased mainly because of the reduction of oxygen vacancies with increasing oxygen flow rate.

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The Analysis of Electrothermal Conductivity Characteristics for SOI(SOS) LIGBT with latch-up

  • Kim, Je-Yoon;Hong, Seung-Woo;Park, Sang-Won;Sung, Man-Young;Kang, Ey-Goo
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.4
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    • pp.129-132
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    • 2004
  • The electrothermal characteristics of a high voltage LIGBT(Lateral Insulated Gate Bipolar Transistor) using thin silicon on insulator (SOI) and silicon on sapphire (SOS) such as thermal conductivity and sink is analyzed by MEDICI. The device simulations demonstrate that the thermal conductivity of the buried oxide is an important parameter for modeling of the thermal behavior of SOI devices. In this paper we simulated the thermal conductivity and temperature distribution of a SOI LIGBT with an insulator layer of SiO$_2$ and $Al_2$O$_3$ at before and after latch-up and verified that the SOI LIGBT with the $Al_2$O$_3$ insulator had good thermal conductivity and reliability.