• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.497-500
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• 2003

In this paper, a new filter structure to improve frequency response characteristics in CIC(Cascaded Integrator-Comb) decimation filters is proposed. Conventional filters improve passband characteristics, but they make worse slinging band characteristics. In this paper, we propose a new filter which is called IFOP(Interpolated Fourth-Order Polynomials). By using this proposed filter, passband droop and aliasing band attenuation are simultaneously improved. Since proposed filter needs only one multiplication computation is not much. And overall linear phase characteristics are maintained since the proposed filter is also linear phase. Finally, implementation cost of the proposed filter is compared with those of conventional filters.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.2
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• pp.80-87
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• 1994

Fetal monitoring is a routine procedure to obtain a record of physiologic functions during pregnancy and labor. It is required to determine fetal heart frequency accurately. There are various types of fetal heart rate(FHR) determination and the most frequently applied method is transabdominal Doppler ultrasound. However, in the case of weak or noise corrupted Doppler ultrasound signals, conventional peak detections and the autocorrelation function method have many difficulties to determine FHR precisely. Also the autocorrelation function is effected by threshold level and window size. To solve these problems, the high resolution pitch determination algorinthm is introduced to detect FHR from Doppler ultrasound signals. This scheme digitally processes Doppler ultrasound signal for digital rectification, envelope detection, decimation and correlation calculation of two interconnected segments and then FHR is determined by its maximal value. Even in the case of a greatly smeared noise signal, this algorithm is able to search FHR more accurately than autocorrelation function by means of compensating FHR with a constant correlation threshold. This algorithm is simulated by 386-MATLAB on PC 486/DX and verified that it is superior to the autocorrelation function method.

• Journal of Sensor Science and Technology
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• v.26 no.5
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• pp.348-352
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• 2017

In this paper, we propose a high resolution A/D converter for a sensor interface that processes low frequency AC signals. A 6b SAR ADC with low power consumption and a 11b incremental ADC with high resolution are combined together to perform 15b resolution. Conventional hybrid ADC has a disadvantage that it can convert t only DC signal, but in this paper, it is possible to convert data to AC signal by increasing input range of incremental ADC. The decimation filter is implemented on-chip. The designed Hybrid ADC operates at supply voltage of 1.8V and consumes the current of 6.98uA. The OSR (oversampling ratio) is 90. And SFDR, SNDR, ENOB and FoMs are 96.59dB, 88.47dB, 14.4-bit and 139.5dB, respectively.

• Proceedings of the KOSOMBE Conference
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• v.1993 no.11
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• pp.194-197
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• 1993

A technique for fast image reduction or expansion, in which the reduction(expansion) factor is either any integer or any rational number M/L Is represented. The multiresolution is modeled as an interpolation and filtering followed by a decimation. The model enables frequency domain analysts of the muitiresolution representations as well as convenient design of the Kernels(filters). Using any rin linear phase(Type I) filters a fine to coarse multiresolution structure can be generated.

• Journal of Information Processing Systems
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• v.15 no.3
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• pp.670-681
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• 2019

Orthogonal frequency division multiplexing (OFDM) is a system which is used to encode data using multiple carriers instead of the traditional single carrier system. This method improves the spectral efficiency (optimum use of bandwidth). It also lessens the effect of fading and intersymbol interference (ISI). In 1995, digital audio broadcast (DAB) adopted OFDM as the first standard using OFDM. Later in 1997, it was adopted for digital video broadcast (DVB). Currently, it has been adopted for WiMAX and LTE standards. In this project, a Verilog design is employed to implement an OFDM transmitter (DAC block) and receiver (FFT and ADC block). Generally, OFDM uses FFT and IFFT for modulation and demodulation. In this paper, 16-point FFT decimation-in-frequency (DIF) with the radix-2 algorithm and direct summation method have been analyzed. ADC and DAC in OFDM are used for conversion of the signal from analog to digital or vice-versa has also been analyzed. All the designs are simulated using Verilog on ModelSim simulator. The result generated from the FFT block after Verilog simulation has also been verified with MATLAB.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.2119.1_2120.1
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• 2009

UWB(Ultra Wide Band)는 차세대 무선통신 기술로 무선 디지털펄스라고도 한다. GHz대의 주파수를 사용하면서도 초당 수천~수백만 회의 저출력 펄스로 이루어진 것이 큰 특징이다[1]. 기존 무선통신 기술의 양대 축인 IEEE 802.11과 블루투스 등에 비해 속도와 전력소모 등에서 월등히 앞서고 있으며, SoC(System on a Chip)의 저전력 구현에 대한 연구가 활발히 진행되고 있다. OFDM은 크게 FFT(Fast Fourier Transform) 블록, Interpolation /decimation 필터 블록, 비터비 블록, 변복조 블록, 등화기 블록 등으로 구성된다. 고속 시스템에서는 대역효율성이 우수한 OFDM(Orthogonal Frequency Division Multiplexing) 방식을 사용하고 있으며, OFDM 전송방식은 직렬로 입력되는 데이터 열을 병렬 데이터 열로 변환한 후에 부반송파에 실어 전송하는 방식이다. 이와 같은 병렬화와 부반송파를 곱하는 동작은 IFFT와 FFT로 구현이 가능한데, FFT 블록의 구현 비용과 전력소모를 줄이는 것이 핵심사항이라고 할 수 있다. 기존논문에서는 OFDM용 FFT 구조로 단일버터플라이연산자 구조, 파이프라인 구조, 병렬구조 등의 여러 구조가 제안되었다[2]. 본 논문에서는 Radix-8 FFT 알고리즘 기반의 New partial Arithmetic 저전력 FFT 구조를 제안하였다. 제안한 New partial Arithmetic 저전력 FFT구조는 곱셈기 대신 병렬 가산기를 이용 하여 지금까지 사용되는 FFT 구조보다 전력소모를 줄일 수 있음을 보였다.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.153-158
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• 2005

In this paper, a filter is proposed to compensate droop of the CIC filter for SDR. The proposed compensation filter has almost linear-phase characteristic, requires low operational complexity, and is cost-effective due to its second-order characteristic and lowest operational rate in the baseband.. Especially, it compensates droop in the passband with little performance degradation in the stopband. It is shown, by a design example and its performance analysis, that the proposed compensation method gives performance enhancement in communication systems. It is also shown that the proposed method is superior to conventional ones in view of memory usage and computational load.

• Journal of the Korea Institute of Military Science and Technology
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• v.22 no.3
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• pp.332-340
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• 2019

Electronic warfare systems are needed to be advantageous in the modern war. Many radar threat signals with various frequency spectrums and complicated techniques exist. For detecting the threats, a receiver with wide and narrow-band digital processing is needed. To process a wide-band searching mode, a polyphase filter bank has become the architecture of choice to efficiently detect threats. A polyphase N-path filter aligns the re-sampled time series in each path, and a discrete Fourier transform aligns phase and separates the sub-channel baseband aliases. Multiple threats and CW are detected or rejected when the signals are received in different sub-channels. And also, to process a narrow-band precision mode, a direct down converter is needed to reduce aliasing by using a decimation filter. These digital logics are designed in a FPGA. This paper shows how to design and develop a wide and narrow-band digital receiver that is capable to detect the threats.

• The Journal of the Korea Contents Association
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• v.6 no.1
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• pp.1-7
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• 2006

This paper proposes a new method that reduces the complexity of the combined system, which consists of the selective mapping(SLM) and the partial transmit sequence(PTS) in the Orthogonal Frequency Division Multiplexing(OFDM). In order to reduce the Peak-to-Average Power Ratio(PAPR), many techniques have been developed such as SLM and PTS. and their combined systems. However the method that simply combines PTS and SLM to improve the effectiveness of a system increases the complexity of calculation. The scheme employed in this research suggests a system that combines PTS and SLM reducing the complexity via the N($N=2^n$)-point inverse fast Fourier transforms(IFFT), which uses the decimation in time domain not only to improve PAPR but also to reduce the amount of calculation. The proposed method reduces the complexity by multiplying a phase sequence and a subblock index to the data sequences in the middle of IFFT, which yields an optimal sequence with minimal PAPR. The superiority of the proposed method is demonstrated by simulation results and analysis.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.6
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• pp.706-715
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• 2012

Electro-optical sigma-delta modulators are the core module of digital receiver to digitize wideband radio-frequency signals directly at an antenna. Electro-optical sigma-delta modulators use a pulsed laser to oversample an input radio-frequency signals at two Mach-Zehnder Interferometer(MZI) and shape the quantization noise using a fiber-lattice accumulator. Decimation filtering is applied to the quantizer output to construct the input signal with high resolution. The jitter affects greatly on reconstructing the original input signal of modulator. This paper analyzes the performance of first order single bit electro-optical sigma-delta modulator in the time domain and the frequency domain. The performance of modulator is analyzed by using asynchronous spectral averaging of the reconstructed signal's spectrum in the frequency domain. The reference value of time jitter is presented by analyzing the performance of jitter effects. This kind of jitter value can be used as a reference value on the design of modulators.