• Title/Summary/Keyword: frame per second

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An Efficient 2-D Conveolver Chip for Real-Time Image Processing (효율적인 실시간 영상처리용 2-D 컨볼루션 필터 칩)

  • 은세영;선우명
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.10
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    • pp.1-7
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    • 1997
  • This paper proposes a new real-time 2-D convolver filter architecture wihtout using any multiplier. To meet the massive amount of computations for real-time image processing, several commercial 2-D convolver chips have many multipliers occupying large VLSI area. Te proposed architecture using only one shift-and-accumulator can reduce the chip size by more than 70% of commercial 2-D convolver filter chips and can meet the real-time image processing srequirement, i.e., the standard of CCIR601. In addition, the proposed chip can be used for not only 2-D image processing but also 1-D signal processing and has bood scalability for higher speed applications. We have simulated the architecture by using VHDL models and have performed logic synthesis. We used the samsung SOG cell library (KG60K) and verified completely function and timing simulations. The implemented filter chip consists of only 3,893 gates, operates at 125 MHz and can meet the real-time image processing requirement, that is, 720*480 pixels per frame and 30 frames per second (10.4 mpixels/second).

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A Study on the Implementation of Web-Camera System and the Measurement of Traffic (웹 카메라 시스템의 구현과 트래픽 측정에 관한 연구)

  • 안영민;진현준;박노경
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.04a
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    • pp.187-189
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    • 2001
  • In this study, the Web Camera System is implementation and simulated on two different architectures. In the one architecture, a Web-server and Camera-server are implemented on the same system, and the system transfers motion picture which compressed to JPEG file to users on the WWW(World Wide Web). In the other architecture, the Web-server and Camera-server are implemented on different systems, and the motion picture is transferred from the Camera-server to Web-server, and finally to users. In order to compare system performance between two architecture, data traffic is measured and simulated in the unit of byte per second and frame per second.

Analysis of the Relationships according to the Frame (f/s) Change of Cine Imaging in Coronary Angiographic System: With Focus on FOV Enlargement and Live Zoom (심장 혈관 조영장치에서의 프레임 레이트(f/s) 변화에 따른 상관 관계 분석 : FOV 확대와 Live Zoom을 중점으로)

  • Kim, Won Hyo;Song, Jong-Nam;Han, Jae-Bok
    • Journal of the Korean Society of Radiology
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    • v.12 no.7
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    • pp.845-852
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    • 2018
  • This study aimed to investigate the difference of X-ray exposure by comparing and analyzing absorbed dose according to changes in the number of frames in coronary angiography, also depending whether the zoom mode is FOV enlargement or Zoom Live. Moreover, for appropriate frame selection measures for examination, including the effect of frame change on the image quality, were sought by measuring the noise strength expressed by the standard deviation (SD), the signal to noise ratio (SNR) and contrast to noise ratio (CNR). The study was conducted with an anthropomorphic phantom on an angio-system. The linear relationship between the frame rate and the radiation dose was evident. On the contrary, the indices of image quality (SD, SNR, and CNR) were almost constant irrespective of the number of frames. The difference depending on the zoom mode was not statistically significant for DAP, air kerma, and SD (p > 0.05). However, SNR and CNR were statistically different between FOV enlargement and Zoom Live. In conclusion, since the image quality was not degraded significantly with the decreasing frame rate from 30, 15, to 7.5 f/s and the radiation dose evidently decreases in almost exactly linear proportion to the decreasing frame rate, the number of frames per second needs to be maintained as low as reasonably achievable. As for the dependence on the zooming mode, the Live Zoom mode showed statistically significant improvement in the image quality indices of SNR and CNR and it justifies active use of the Live Zoom mode which enables real-time image enlargment without additional radiation dose.

Rate control to reduce bitrate fluctuation on HEVC

  • Yoo, Jonghun;Nam, Junghak;Ryu, Jiwoo;Sim, Donggyu
    • IEIE Transactions on Smart Processing and Computing
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    • v.1 no.3
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    • pp.152-160
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    • 2012
  • This paper proposes a frame-level rate control algorithm for low delay video applications to reduce the fluctuations in the bitrate. The proposed algorithm minimizes the bitrate fluctuations in two ways with minimal coding loss. First, the proposed rate control applies R-Q model to all frames including the first frame of every group of pictures (GOP) except for the first one of a sequence. Conventional rate control algorithms do not use any R-Q models for the first frame of each GOP and do not estimate the generated-bit. An unexpected output rate result from the first frame affects the remainder of the pictures in the rate control. Second, a rate-distortion (R-D) cost is calculated regardless of the hierarchical coding structure for low bitrate fluctuations because the hierarchical coding structure controls the output bitrate in rate distortion optimization (RDO) process. The experimental results show that the average variance of per-frame bits with the proposed algorithm can reduce by approximately 33.8% with a delta peak signal-to-noise ratio (PSNR) degradation of 1.4dB for a "low-delay B" coding structure and by approximately 35.7% with a delta-PSNR degradation of 1.3dB for a "low-delay P" coding structure, compared to HM 8.0 rate control.

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Detecting Digital Micromirror Device Malfunctions in High-throughput Maskless Lithography

  • Kang, Minwook;Kang, Dong Won;Hahn, Jae W.
    • Journal of the Optical Society of Korea
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    • v.17 no.6
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    • pp.513-517
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    • 2013
  • Recently, maskless lithography (ML) systems have become popular in digital manufacturing technologies. To achieve high-throughput manufacturing processes, digital micromirror devices (DMD) in ML systems must be driven to their operational limits, often in harsh conditions. We propose an instrument and algorithm to detect DMD malfunctions to ensure perfect mask image transfer to the photoresist in ML systems. DMD malfunctions are caused by either bad DMD pixels or data transfer errors. We detect bad DMD pixels with $20{\times}20$ pixel by white and black image tests. To analyze data transfer errors at high frame rates, we monitor changes in the frame rate of a target DMD pixel driven by the input data with a set frame rate of up to 28000 frames per second (fps). For our data transfer error detection method, we verified that there are no data transfer errors in the test by confirming the agreement between the input frame rate and the output frame rate within the measurement accuracy of 1 fps.

Design and Implementation of Real-time High Performance Face Detection Engine (고성능 실시간 얼굴 검출 엔진의 설계 및 구현)

  • Han, Dong-Il;Cho, Hyun-Jong;Choi, Jong-Ho;Cho, Jae-Il
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.2
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    • pp.33-44
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    • 2010
  • This paper propose the structure of real-time face detection hardware architecture for robot vision processing applications. The proposed architecture is robust against illumination changes and operates at no less than 60 frames per second. It uses Modified Census Transform to obtain face characteristics robust against illumination changes. And the AdaBoost algorithm is adopted to learn and generate the characteristics of the face data, and finally detected the face using this data. This paper describes the face detection hardware structure composed of Memory Interface, Image Scaler, MCT Generator, Candidate Detector, Confidence Comparator, Position Resizer, Data Grouper, and Detected Result Display, and verification Result of Hardware Implementation with using Virtex5 LX330 FPGA of Xilinx. Verification result with using the images from a camera showed that maximum 32 faces per one frame can be detected at the speed of maximum 149 frame per second.

Influence of DIC Frame Rate on Experimental Determination of Instability and Fracture Points for DP980 Sheets under Various Loading Conditions (다양한 하중 조건에서 DP980 판재의 불안정성 및 파단점 결정시 DIC Frame Rate의 영향)

  • Noh, E.;Hong, S.
    • Transactions of Materials Processing
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    • v.28 no.6
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    • pp.368-374
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    • 2019
  • The past recent years have seen an increasing use of high-strength steel sheets in the automotive industry. However, the formability and damage prediction of these materials requires accurate acquisition of necking and fracture strains. Digital image correlation (DIC) is used to accurately capture the necking and fracture strains during testing. The fact that single time points of capturing vary with frame rate makes the need for an investigation necessary. For the high-strength steel DP980, the frame-rate dependences of the final necking and fracture strains values are analyzed here. To eliminate the influence of gauge length, the strains were measured locally by DIC. Results for three specimen shapes obtained with frame rates of 1 and 900 fps (frames per second) were considered and based on them, triaxiality failure diagrams (TFD) are established. It was observed that after diffuse necking, the deformation path departed from the initially linear one, and the stress triaxiality grew with ongoing deformation. It was further revealed that the frame rate-dependence of the necking strain was rather low (< 2%), whereas the fracture strain could be underestimated by up to 8% when the lower frame rate of 1 fps was used (compared with 900 fps). In this study, this issue is investigated while taking into consideration the three different triaxialities. These results demonstrate the importance of choosing an appropriate frame rate for the determination of necking and fracture strains in particular.

Implementation of SA-DCT using a datapath (데이터패스를 이용한 SA-DCT 구현)

  • 박주현;김영민
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.5
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    • pp.25-32
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    • 1998
  • In this paper, SA (shape adaptive)-DCT is implemented using a datapath with 4 MACs (multiplication & accumulator). DCT is a well-known bottleneck of real-time video compression using MPEG-like schemes. High-speed pipelined MACs presented here implement real-time DCT. A datapath in this paper executes DCT/IDCT algorithms for QCIF 15fps(frame per second), maximum rate of VLBV(very low bitrte video) in MPEG-4. A 32bit accumulator in a MAC prevents distortion caused by fixed-point process. It can be applied to various operations such as ME (motion estimation) and MC(motion compensation) with a absolutor and a halfer.

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DCT Implementation on FPGA for HDTV Encoder (FPGA를 이용한 HDTV인코더를 위한 DCT회로의 구현)

  • 김우철;정규철;고광철;정재명
    • Proceedings of the IEEK Conference
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    • 2002.06d
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    • pp.235-238
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    • 2002
  • This paper presents a way of a novel FPGA implementation of DCT. It shows how to limit the required bits on each DCT processing step, instead of implementing high-cost 64-bit floating-point arithmetic of IEEE Std 754-1985 on FPGA. ID-DCT implementation has been done which operates at 30 frame per second with 1920${\times}$1080 resolution.

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Video Surveillance System Design and Realization with Interframe Probability Distribution Analyzation (인터프레임 확률분포분석에 의한 비디오 감시 시스템 설계 구현)

  • Ryu, Kwang-Ryol;Kim, Ja-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.6
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    • pp.1064-1069
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    • 2008
  • A system design and realization for video surveillance with interframe probability distribution analyzation is presented in this paper. The system design is based on a high performance DSP professor, video surveillance is implemented by analyzing interframe probability distribution using trivariate normal distribution(weight, mean, variance) for scanning objects in a restricted area and the video analysis algorithm is decided for forming a different image from the probability distribution of several frame compressed by the standardized JPEG. The system processing time of D1$(720{\times}480)$ image per frame is 85ms and enables to process the system at 12 frames per second. An object surveillance about the restricted area by rules is extracted to 100% unless object is moved faster.