• Journal of the Korean Vacuum Society
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• v.18 no.6
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• pp.474-480
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• 2009

We have investigated optical properties of InAs quantum dots (QDs) grown on GaAs (100) substrate by molecular beam epitaxy, by means of photoluminescence (PL) and time-resolved PL spectroscopy. InAs QDs were grown by using In interruption growth technique, in which the In flux was periodically interrupted by a closed In shutter during InAs QDs growth. The shutter of In source was opened for 1 s and then closed for 0, 9, 19, 29, or 39 s. This growth sequence was repeated 30 times during QDs growth. For each sample, the total amount of In contributing to the growth was the same (30 s) but total growth time was varied during the InAs growth. As the In interruption time is increased from 0 to 19 s, the PL peak position of the QDs is red-shifted from 1096 to 1198 nm, and the PL intensity is increased. However, the PL peak is unchanged and the intensity is decreased as the In interruption time is increased further to 39 s. The PL decay times measured at the PL peak position for all the InAs QDs are independent on the QD growth conditions and showed about 1 ns. The red-shift of PL peak and the increase of PL intensity can be explained due to increased QD size and the enhancement in the migration of In atoms using In interruption technique. These results indicated that the size and shape of InAs QDs can be controlled by using In interruption growth technique. Thus the emission wavelength of the InAs QDs on GaAs substrate can also be controlled.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.109-110
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• 2002

The purpose of a superconductive DC/SFQ circuit is to produce a controlled number of picosecond single flux quantum pulses at the output when a slowly changing DC current is applied to the input. In this work, we have designed and simulated a DC/SFQ circuit based on Nb/Al$O_{x}$/Nb Josephson junction technology. From the simulation, we could obtain the margins for various circuit parameters. And also we have successfully operated a DC/SFQ circuit which was fabricated with the same design. The margin for the input bias current of the circuit was observed to be of $\pm$60%, which was very close to the simulated value.

• Progress in Superconductivity and Cryogenics
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• v.5 no.1
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• pp.44-47
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• 2003

There are several simulation programs in studying superconductor RSFQ (Rapid Single flux Quantum) electronic devices, which include WRspice, WinS, PSCAN, and JSIM. Even though different research groups use different simulation programs, it is not well known about which program gives the simulation results closer to the measurement values. In this work, we used both WRspice and WinS to simulate RSFQ OR gate and to compare the results from the different simulations. This comparison would help in deciding which program is better in the RSFQ circuit design. In the confluence buffer, which is the one of the main components of the DR gate, the measured bias margins were ${\times}23.2%$, while the margins from the simulations were ${\pm}35.56%$ from WRspice and it 53.1% from WinS. However, with the actual fabricated circuit parameters WRspice gave ${\pm}27%$. In WinS the circuit did not operate. We concluded that WRspice is more reliable.

• Progress in Superconductivity
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• v.5 no.1
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• pp.21-25
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• 2003

We have designed and simulated an 1-bit ALU (Arithmetic Logic Unit) by using a half adder. An ALU is the part of a computer processor that carries out arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We constructed an 1-bit ALU by using only one half adder and three control switches. We designed the control switches in two ways, dc switch and NDRO (Non Destructive Read Out) switch. We used dc switches because they were simple to use. NDRO pulse switches were used because they can be easily controlled by control signals of SET and RESET and show fast response time. The simulation results showed that designed circuits operate correctly and the circuit minimum margins were ＋/-27%. In this work, we used simulation tools of XIC and WRSPICE. The circuit layouts were also performed. The circuits are being fabricated.

• 한국초전도학회:학술대회논문집
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• v.9
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• pp.48-53
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• 1999

We demonstrate small-scale high-T$_c$ superconductor RSFQ(Rapid Single Flux Quantum) circuits using multilayer bicrystal technology. An RSFQ balanced comparator is demonstrated with good current resolution, and its operating conditions are discussed in some detail. A single-loop delta-sigma modulator is realized adding a feedback loop to the comparator. The effect of the feedback is confirmed by dc measurement and simulation. A design of an RSFQ toggle flip-flop with the same multilayer bicrystal technology is suggested.

• Progress in Superconductivity and Cryogenics
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• v.7 no.1
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• pp.17-20
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• 2005

We has designed, fabricated, and measured a Single flux quantum (SFQ) toggle flip-flop (TFF). The TFF is widely used in superconductive digital electronics circuits. Many digital devices, such as frequency counter, counting ADC and program counter be used TFF Specially, a program counter may be constructed based on TFF We have designed the newly TFF and obtained high bias margins on test. In this work, we used two circuit simulation tools, WRspice and Julia, as circuit optimization tools. We used XIC for a layout tool. Newly designed TFF had minimum bias margins of +/- $37\%$ and maximum bias margins of +/-$37\%$(enhanced from +/- $37\%$). The designed circuits were fabricated by using Nb technology The test results showed that the re-optimized TFF operated correctly on 100kHz and had a very wide bias margins of +/- $53\%$.

• Progress in Superconductivity
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• v.4 no.1
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• pp.37-41
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• 2002

In this work. we have designed two different kinds of Rapid Single Flux Quantum (RSFQ) OR-gates. One was based on the already developed RSFQ cells and the other was aimed to develop a more compact version. In the first circuit, we used a combination of two D Flip-Flops and a merger and in the other circuit we used a combination of RS Flip-Flops and Confluence Buffer. We tested the circuit performance by using the simulation tools, Xic and Wrspice. We obtained the operation margins of the circuit elements by a margin calculation program, and we obtained the minimum operation margins of $\pm$30%. The circuits were laid out, aimed to fabricate by using the existing KRISS Nb process. KRISS Nb process includes the $Nb／Al_2$$O_3$／Nb trilayer fabricated by DC magnetron sputtering and the reactive ion etching technique for the definition of the features. The major tools used in the layouts were Xic and L-meter.

• Progress in Superconductivity
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• v.9 no.2
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• pp.157-161
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• 2008

Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.117-119
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• 2003

We have designed fabricated, and tested an RSFQ(Rapid Single Flux Quantum) 1-bit ALU (Arithmetic Logic Unit). The 1-bit ALU was composed of a half adder and three SFQ DC switches. Three DC switches were attached to the two output ports of an ALU for the selection of each function from the available functions that were AND, OR, XOR and ADD. And we also attached two DC switches at the input ports of the half adder so that the input data were controlled using the function generators operating at low speed while we tested the circuit at high speed. The test bandwidth was from 1KHz to 5 ㎓. The chip was tested at the liquid helium temperature of 4.2 K.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.76-78
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• 2003

We have designed and tested an RSFQ (Rapid Single Flux Quantum) NDRO (Non Destructive Read Out) circuit for the development of a high speed superconducting ALU (Arithmetic Logic Unit). When designing the NDRO circuit, we used Julia, XIC and Lmeter for the circuit simulations and layouts. We obtained the simulation margins of larger than $\pm$25％. For the tests of NDRO operations, we attached the three DC/SFQ circuits and two SFQ/DC circuits to the NDRO circuit. In tests, we used an input frequency of 1 KHz to generate SFQ Pulses from DC/SFQ circuit. We measured the operation bias margin of NDRO to be $\pm$15％. The circuit was measured at the liquid helium temperature.