• 제목/요약/키워드: fixed-point simulation

검색결과 216건 처리시간 0.022초

SOME FIXED POINT THEOREMS FOR RATIONAL (𝛼, 𝛽, Z)-CONTRACTION MAPPINGS UNDER SIMULATION FUNCTIONS AND CYCLIC (𝛼, 𝛽)-ADMISSIBILITY

  • Snehlata, Mishra;Anil Kumar, Dubey;Urmila, Mishra;Ho Geun, Hyun
    • Nonlinear Functional Analysis and Applications
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    • 제27권4호
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    • pp.757-771
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    • 2022
  • In this paper, we present some fixed point theorems for rational type contractive conditions in the setting of a complete metric space via a cyclic (𝛼, 𝛽)-admissible mapping imbedded in simulation function. Our results extend and generalize some previous works from the existing literature. We also give some examples to illustrate the obtained results.

𝓗-SIMULATION FUNCTIONS AND Ωb-DISTANCE MAPPINGS IN THE SETTING OF Gb-METRIC SPACES AND APPLICATION

  • Tariq Qawasmeh
    • Nonlinear Functional Analysis and Applications
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    • 제28권2호
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    • pp.557-570
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    • 2023
  • The conceptions of generalized b-metric spaces or Gb-metric spaces and a generalized Ω-distance mappings play a key role in proving many important theorems in existence and uniqueness of fixed point theory. In this manuscript, we establish a new type of contraction namely, Ωb(𝓗, 𝜃, s)-contraction, this contraction based on the concept of a generalized Ω-distance mappings which established by Abodayeh et.al. in 2017 together with the concept of 𝓗-simulation functions which established by Bataihah et.al [10] in 2020. By utilizing this new notion we prove new results in existence and uniqueness of fixed point. On the other hand, examples and application were established to show the importance of our results.

고정소수점 DSP(ADSP-2181)을 이용한 실시간 G.723.1 음성부호화기 개발에 관한 연구 (A Study on the Development of the Real-Time G.723.1 Speech Codec Using a Fixed-Point DSP(ADSP-2181))

  • 박정재;정익주
    • 음성과학
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    • 제3권
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    • pp.177-186
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    • 1998
  • This paper describes the procedure of implementing a real-time speech codec, G.723.1 which was developed by DSP Group and standardized by ITU-T, using fixed-point DSP, ADSP-2181. This codec has two bit rates associated with it, 5.3 and 6.3 kbit/s. We implemented only one bit rate, 6.3 kbit/s, of the two with fixed-point 32-bit precision. According to the result of the experiment, the amount of computational burden is about 55 MIPS and its quality is similar to the result of the PC simulation with floating-point arithmetic. In this paper, we proposed a method to use a fixed-point DSP and a procedure for developing a real-time speech codec using DSPs and finally developed a G.723.l speech codec for ADSP-2181.

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DSP 기반의 실시간 심실세동 검출 시스템 개발 (Development of Real-Time Ventricular Fibrillation Detection System based on DSP Processor)

  • 송미혜;장봉렬;이경중
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.873-874
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    • 2006
  • In this paper, we have developed a ventricular fibrillation detection system based on DSP processor. The developed system was able to detect VF in real time correctly and quickly. We compared the performance of the floating point simulation with that of fixed point simulation. The computational cost of fixed point simulation was remarkably reduced than that of floating point simulation.

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위성 통신용 리턴 링크 복조기의 성능 개선에 관한 연구 (A Study about Performance Improvement of Return Link Demodulator for Satellite Communication)

  • 왕도휘;오덕길
    • 한국위성정보통신학회논문지
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    • 제7권1호
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    • pp.92-96
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    • 2012
  • 본 논문은 복잡한 신호처리 기능을 포함하는 리턴 링크 복조 알고리즘이 낮은 SNR에서도 안정적으로 동작하도록 하기 위해 하드웨어에 적합하도록 설계하여 HDL로 구현하는 것을 목적으로 한다. 모의실험 결과 Uncoded BER $10^{-3}$ 지점에서의 Es/$N_0$가 이상적인 QPSK 신호 대비 0.5dB 이내로의 성능개선을 이룬 것을 확인할 수 있다. 또한 이에 대한 Fixed-Point Simulation 및 HDL 구현 성능이 모의실험 대비 차이가 없음을 확인할 수 있다.

BILINEAR SYSTEMS CONTROLLER DESIGN WITH APPROXIMATION TECHNIQUES

  • Lee, Sang-Hyuk;Lee, Keonhee
    • 충청수학회지
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    • 제18권1호
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    • pp.101-116
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    • 2005
  • Using the iterative method, we derive an controller realization of the bilinear system, which is resulted from the system reformulation. We utilize Banach Fixed Point Theorem to support proposed controller, and the simulation results are also illustrated to verify usefulness of this technique.

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미지의 주행저항을 고려한 도시철도차량 ATO의 속도추종 및 정밀정차 제어 (The speed regulation and fixed point parking control of urban railway ATO considering unknown running resistance)

  • 변윤섭;한성호;김길동;백광선;한영재
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 1999년도 추계학술대회 논문집
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    • pp.280-287
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    • 1999
  • An automatic train operation(ATO) system executes the operation of constant speed travelling and fixed point parking by using microprocessors instead of drivers manual operation. This paper describes the mathematical model for the train considering unknown disturbances which consist of start resistance, travelling resistance, slope resistance, curve resistance, and so on. The speed controller of ATO system is designed by considering the disturbances. The simulation is executed to verify the speed control and fixed point parking performance and to compare its performance with that of a PID-type ATO control system under disturbances. Simulation results show that the control performance of gain scheduled control scheme fur ATO system is better than that of the conventional PID controller.

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𝓗(ω, θ)-CONTRACTION AND SOME NEW FIXED POINT RESULTS IN MODIFIED ω-DISTANCE MAPPINGS VIA COMPLETE QUASI METRIC SPACES AND APPLICATION

  • Abedalkareem Alhazimeh;Raed Hatamleh
    • Nonlinear Functional Analysis and Applications
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    • 제28권2호
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    • pp.395-405
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    • 2023
  • In this manuscript, we establish the concept of 𝓗(ω, θ)-contraction which based on modified ω distance mappings which introduced by Alegre and Marin [4] in 2016 and 𝓗 simulation functions which introduced by Bataihah et.al. [14] in 2020 and we employ our contraction to prove the existence and uniqueness some new fixed point results. On the other hand, we create some examples and an application to show the importance of our results.

고정 소수점 연산을 이용한 WCDMA 중계기에서의 귀환 신호제거 알고리즘의 개발 (Development of Interference Cancellation Algorithm for WCDMA Repeater under Fixed-Point Operation)

  • 정희석;윤기방;김기두
    • 대한전자공학회논문지SP
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    • 제46권1호
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    • pp.95-103
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    • 2009
  • 본 논문에서는 WCDMA RF 중계기 시스템에서 송신안테나에서 전송 증폭된 중계신호가 수신안테나로 귀환되는 현상을 제거하고자 고정 소수점 연산의 ICS 알고리즘을 이용하여 중계기의 성능을 향상시킨다. 귀환 신호의 제거를 위한 LMS 기반의 ICS 알고리즘은 고속 DSP 프로세서나 대용량 FPGA를 사용하며, 이때 부동 소수점 연산을 위한 처리장치는 가격이 고가인 단점이 있다. 본 논문에서는 고정 소수점 연산 프로세서를 사용하여 ICS 알고리즘을 구현할 수 있도록 고정 소수점 연산용 ICS 알고리즘을 개발하고, 알고리즘의 성능검증을 위하여 부동 소수점 연산을 사용한 경우와 비교 시뮬레이션을 수행한다.