• 제목/요약/키워드: field effect transistor

검색결과 795건 처리시간 0.033초

Radiation-hardened-by-design preamplifier with binary weighted current source for radiation detector

  • Minuk Seung;Jong-Gyun Choi ;Woo-young Choi;Inyong Kwon
    • Nuclear Engineering and Technology
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    • 제56권1호
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    • pp.189-194
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    • 2024
  • This paper presents a radiation-hardened-by-design preamplifier that utilizes a self-compensation technique with a charge-sensitive amplifier (CSA) and replica for total ionizing dose (TID) effects. The CSA consists of an operational amplifier (OPAMP) with a 6-bit binary weighted current source (BWCS) and feedback network. The replica circuit is utilized to compensate for the TID effects of the CSA. Two comparators can detect the operating point of the replica OPAMP and generate appropriate signals to control the switches of the BWCS. The proposed preamplifier was fabricated using a general-purpose complementary metal-oxide-silicon field effect transistor 0.18 ㎛ process and verified through a test up to 230 kGy (SiO2) at a rate of 10.46 kGy (SiO2)/h. The code of the BWCS control circuit varied with the total radiation dose. During the verification test, the initial value of the digital code was 39, and a final value of 30 was observed. Furthermore, the preamplifier output exhibited a maximum variation error of 2.39%, while the maximum rise-time error was 1.96%. A minimum signal-to-noise ratio of 49.64 dB was measured.

InGaZnO active layer 두께에 따른 thin-film transistor 전기적인 영향

  • 우창호;김영이;안철현;김동찬;공보현;배영숙;서동규;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.5-5
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    • 2009
  • Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

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2-Hexylthieno[3,2-b]thiophene-substituted Anthracene Derivatives for Organic Field Effect Transistors and Photovoltaic Cells

  • Jo, So-Young;Hur, Jung-A;Kim, Kyung-Hwan;Lee, Tae-Wan;Shin, Ji-Cheol;Hwang, Kyung-Seok;Chin, Byung-Doo;Choi, Dong-Hoon
    • Bulletin of the Korean Chemical Society
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    • 제33권9호
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    • pp.3061-3070
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    • 2012
  • Novel 2-hexylthieno[3,2-b]thiophene-containing conjugated molecules have been synthesized via a reduction reaction using tin chloride in an acidic medium. They exhibited good solubility in common organic solvents and good self-film and crystal-forming properties. The single-crystalline objects were fabricated by a solvent slow diffusion process and then were employed for fabricating field-effect transistors (FETs) along with thinfilm transistors (TFTs). TFTs made of 5 and 6 exhibited carrier mobility as high as 0.10-0.15 $cm^2V^{-1}s^{-1}$. The single-crystal-based FET made of 6 showed 0.70 $cm^2V^{-1}s^{-1}$ which was relatively higher than that of the 5-based FET (${\mu}=0.23cm^2V^{-1}s^{-1}$). In addition, we fabricated organic photovoltaic (OPV) cells with new 2-hexylthieno [3,2-b]thiophene-containing conjugated molecules and methanofullerene [6,6]-phenyl C61-butyric acid methyl ester ($PC_{61}BM$) without thermal annealing. The ternary system for a bulk heterojunction (BHJ) OPV cell was elaborated using $PC_{61}BM$ and two p-type conjugated molecules such as 5 and 7 for modulating the molecular energy levels. As a result, the OPV cell containing 5, 7, and $PC_{61}BM$ had improved results with an open-circuit voltage of 0.90 V, a short-circuit current density of 2.83 $mA/cm^2$, and a fill factor of 0.31, offering an overall power conversion efficiency (PCE) of 0.78%, which was larger than those of the devices made of only molecule 5 (${\eta}$~0.67%) or 7 (${\eta}$~0.46%) with $PC_{61}BM$ under identical weight compositions.

2.14-GHz 대역 고효율 Class-F 전력 증폭기 개발 (Development of a 2.14-GHz High Efficiency Class-F Power Amplifier)

  • 김정준;문정환;김장헌;김일두;전명수;김범만
    • 한국전자파학회논문지
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    • 제18권8호
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    • pp.873-879
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    • 2007
  • 본 논문에서는 Freescale사의 Si-LDMOSFET 4-W 소자를 이용하여 고효율 class-F 전력 증폭기를 구현하였다. Class-F 전력 증폭기를 구현하는데 있어서 모든 하모닉 성분들에 대해 원하는 임피던스를 갖도록 조정하기는 불가능하기 때문에 2차와3차 하모닉 성분만을 조율하여 회로의 간결함과 동시에 상대적으로 높은 효율을 얻을 수 있었다. 또한, 본 논문에 설계된 증폭기는 보다 정확하게 하모닉 성분을 조율하기 위해, LDMOSFET의 대신 호 등가 모델에서 가장 큰 영향을 미치는 drain-source capacitance(Cds)와 bonding inductance(Lb)를 추출하여 하모닉 조율 회로를 설계하였다 제작된 고효율 class-F 전력 증폭기의 측정 결과 drain-efficiency(DE) 65.1%, power-added-efficiency(PAE) 60.3%의 효율을 얻을 수 있었다.

Effect of Annealing Temperature on the Electrical Performance of SiZnSnO Thin Film Transistors Fabricated by Radio Frequency Magnetron Sputtering

  • Kim, Byoungkeun;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제18권1호
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    • pp.55-57
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    • 2017
  • Amorphous oxide thin film transistors (TFTs) were fabricated with 0.5 wt% silicon doped zinc tin oxide (a-0.5SZTO) thin film deposited by radio frequency (RF) magnetron sputtering. In order to investigate the effect of annealing treatment on the electrical properties of TFTs, a-0.5SZTO thin films were annealed at three different temperatures ($300^{\circ}C$, $500^{\circ}C$, and $700^{\circ}C$ for 2 hours in a air atmosphere. The structural and electrical properties of a-0.5SZTO TFTs were measured using X-ray diffraction and a semiconductor analyzer. As annealing temperature increased from $300^{\circ}C$ to $500^{\circ}C$, no peak was observed. This provided crystalline properties indicating that the amorphous phase was observed up to $500^{\circ}C$. The electrical properties of a-0.5SZTO TFTs, such as the field effect mobility (${\mu}_{FE}$) of $24.31cm^2/Vs$, on current ($I_{ON}$) of $2.38{\times}10^{-4}A$, and subthreshold swing (S.S) of 0.59 V/decade improved with the thermal annealing treatment. This improvement was mainly due to the increased carrier concentration and decreased structural defects by rearranged atoms. However, when a-0.5SZTO TFTs were annealed at $700^{\circ}C$, a crystalline peak was observed. As a result, electrical properties degraded. ${\mu}_{FE}$ was $0.06cm^2/Vs$, $I_{ON}$ was $5.27{\times}10^{-7}A$, and S.S was 2.09 V/decade. This degradation of electrical properties was mainly due to increased interfacial and bulk trap densities of forming grain boundaries caused by the annealing treatment.

AlGaN/GaN HEMT의 채널폭 스케일링에 따른 협폭효과 (Narrow channel effect on the electrical characteristics of AlGaN/GaN HEMT)

  • 임진홍;김정진;심규환;양전욱
    • 전기전자학회논문지
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    • 제17권1호
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    • pp.71-76
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    • 2013
  • 본 연구에서는 AlGaN/GaN HEMT (High electron mobility transistor)를 제작하고 채널폭의 감소에 따른 특성의 변화를 고찰하였다. AlGaN/GaN 이종접합구조 기반의 기판 위에 채널의 길이는 $1{\mu}m$, 채널 폭은 각각 $0.5{\sim}9{\mu}m$가 되도록 전자선 리소그라피 방법으로 트랜지스터를 제작하였다. 게이트를 형성하지 않은 상태에서 채널의 면저항을 측정한 결과 sub-${\mu}m$ 크기로 채널폭이 작아짐에 따라 채널의 면저항이 급격히 증가하였으며, 트랜지스터의 문턱전압은 $1.6{\mu}m$$9{\mu}m$의 채널폭에서 -2.85 V 이었으며 $0.9{\mu}m$의 채널폭에서 50 mV의 변화, $0.5{\mu}m$에서는 350 mV로 더욱 큰 변화를 보였다. 트랜스컨덕턴스는 250 mS/mm 내외의 값으로부터 sub-${\mu}m$ 채널에서 150 mS/mm로 채널폭에 따라 감소하였다. 또한, 게이트의 역방향 누설전류는 채널폭에 따라 감소하였으나 sub-${\mu}m$ 크기에서는 감소가 둔화되었는데 채널폭이 작아짐에 따라 나타는 이와 같은 일련의 현상들은 AlGaN 층의 strain 감소로 인한 압전분극 감소가 원인이 되는 것으로 사료된다.

Basic characteristics of metal-ferroelectric-insulator-semiconductor structure using a high-k PrOx insulator layer

  • Noda, Minoru;Kodama, Kazushi;Kitai, Satoshi;Takahashi, Mitsue;Kanashima, Takeshi;Okuyama, Masanori
    • E2M - 전기 전자와 첨단 소재
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    • 제16권9호
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    • pp.64.1-64
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    • 2003
  • A metal-ferroelectric [SrBi$_2$Ta$_2$O$\_$9/ (SBT)-high-k-insulator(PrOx)-semiconductor(Si) structure has been fabricated and evaluated as a key part of metal-ferroelectric-insulator-semiconductor-field-effect-transistor MFIS-FET memory, aiming to improve the memory retention characteristics by increasing the dielectric constant in the insulator layer and suppressing the depolarization field in the SBT layer. A 20-nm PrOx film grown on Si(100) showed both a high of about 12 and a low leakage current density of less than 1${\times}$ 10e-8 A/$\textrm{cm}^2$ at 105 MV/cm. A 400-nm SBT film prepared on PrOx/Si shows a preferentially oriented (105) crystalline structure, grain size of about 130 nm and subface roughness of 3.2 nm. A capacitance-voltage hysteresis is confirmed on the Pt/SBT/PrOx/Si diode with a memory window of 0.3V at a sweep voltage width of 12 V. The memory retention time was about 1 104s, comparable to the conventional Pt/SBT/SiO$\_$x/N$\_$y/(SiO$\_$N/)/Si. The gradual change of the capacitance indicates that some memory degradation mechanism is different from that in the Pt/SBT/SiON/Si structure.

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비균일 100V 급 초접합 트랜치 MOSFET 최적화 설계 연구 (A Study on Optimal Design of 100 V Class Super-junction Trench MOSFET)

  • 노영환
    • 전자공학회논문지
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    • 제50권7호
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    • pp.109-114
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    • 2013
  • 전력 MOSFET(산화물-반도체 전위 효과 트랜지스터)는 BLDC 모터와 전력 모듈 등에 광범위하게 사용하고 있다. 기존 전력 MOSFET 구조는 온-저항과 항복전압사이에 절충(tradeoff)이 필요하다. 이러한 절충을 하지 않고 최적화를 하기위해 비균일 초접합 트랜치 MOSFET 를 설계하는데 동일한 항복전압에서 균일 초접합 트랜치 MOSFET보다 낮은 온-저항을 갖도록한다. 이를 위해 드리프트 영역에서 우수한 전기장 분포를 달성하기 위하여 선형구조의 도핑 프로파일을 제안하고, 단위 셀 설계, 도핑농도의 특성분석, 전위분포를 SILVACO TCAD 2D인 Atlas 소자 소프트웨어를 사용하여 시뮬에이션을 수행하였다. 결과로 100V 급 MOSFET에서 비균일 초접합 트랜치 MOSFET가 균일 초접합 트랜치 MOSFET보다 온-저항에서 우수한 특성을 보여주고 있다.

TCAD를 이용한 MOSFET의 Scaling에 대한 특성 분석 (Analysis on the Scaling of MOSFET using TCAD)

  • 장광균;심성택;정정수;정학기;이종인
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2000년도 춘계종합학술대회
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    • pp.442-446
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    • 2000
  • MOSFET는 속도의 증가, 전력 감소 그리고 집적도 증가를 위한 끊임없는 요구에 대응하여 최근 10년간 많은 변화를 겪었다. 그로 인한 스켈링이론이 부각되었고 풀 밴드 Monte Carlo 디바이스 시뮬레이터는 다른 형태의 n-channel MOSFET 구조에서 hot carrier에 대한 디바이스 스켈링의 효과를 연구하는데 사용되었다. 본 연구에서는 단일 Source/Drain 주입의 Conventional MOSFET와 저도핑 Drain(LDD) MOSFEI 그리고 MOSFET을 고도핑된 ground plane 위에 적충하여 만든 EPI MOSFET에 대하여 TCAD(Technology Compute. Aided Design)를 사용하여 스켈링 및 시뮬레이션하였다. 스켈링방법은 Constant-Voltage 스켈링을 사용하였고 시뮬레이션 결과로 스켈링에 대한 MOSFET의 특성과 임팩트 이온화, 전계를 비교 분석을 통해 TCAD의 실용성을 살펴보았고 스켈링을 이해하기 위한 물리적인 토대를 제시하였다.

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고유전 $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ 게이트 절연막을 이용한 저전압 구동 상온공정 ZnO 박막트랜지스터 (Low-Voltage, Room temperature Fabricated ZnO Thin Film Transistor using High-K $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ Gate Insulator)

  • 조남규;김동훈;김경선;김호기;김일두
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.96-96
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    • 2007
  • Low voltage organic TFTs (OTFTs) and ZnO based TFTs (<5V), utilizing room temperature deposited $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin films were recently reported, pointing to high-k gate insulators as a promising route for realizing low voltage operating flexible electronics. $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin film is one of the most promising materials for gate insulator because of its large dielectric constant (~60) at room temperature. However their tendency to suffer from relatively high leakage current at low electric field (>0.3MV/cm) hinder the application of BZN thin films for gate insulator. In order to improve leakage current characteristics of BZN thin film, we mixed 30mol% MgO with 70mol% BZN and their dielectric and electric properties were characterized. We fabricated field-effect transistors with transparent oxide semiconductor ZnO serving as the electron channel and high-k $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ as the gate insulator. The devices exhibited low operation voltages (<4V) due to high capacitance of the $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ dielectric.

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