• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.5
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• pp.899-905
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• 2017

This paper presents a reference-less dual loop clock and data recovery (CDR) circuit that supports a data rate of 2.496 Gb/s for the mobile industry processor interface (MIPI) M-PHY. An adaptive loop bandwidth scheme is used to implement the fast lock time maintaining a low time jitter. To this scheme, the proposed CDR consists of two loops for a frequency locked loop and a phase locked loop. The proposed 2.496 Gb/s reference-less dual loop CDR is designed using a 65 nm CMOS process with 1.2 V supply voltage. The simulated peak-to-peak jitter of output clock is 9.26 ps for the input data of 2.496 Gb/s pseudo-random binary sequence (PRBS) 15. The active area and power consumption of the implemented CDR are $470{\times}400{\mu}m^2$ and 6.49 mW, respectively.

• Journal of KIISE:Databases
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• v.29 no.3
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• pp.159-167
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• 2002

Recently, a major issue in the research of metadata is the standardization of metadata format. The new extension capability of metadata in the standardization requires some changes - storing and managing dynamic data consistently. In this paper, we define the characteristics of new metadata and propose a concurrency control called Two Version Latch (2VL). 2VL uses a latch and maintains two versions. Maintaining two versions using latch minimizes conflicts between read operation and write operation. The removal of unnecessary lock holding minimizes refresh latency. Therefore, this algorithm presents fast response time and recent data retrieval in read operation execution. As a result of the performance evaluation, the 2VL algorithm is shown to be better than other algorithms in metadata management system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.11a
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• pp.161-166
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• 1999

The global trends of mobile communication system is moving toward digitizing, high-speed and large-capacity. Also, to utilize the limited frequency-resource efficiently, spread spectrum system is a mainstream. In this study we are concerning with the fast frequency-hopping system. Instead of the PLL with many problems such as phase-noise, we used the DDS is popular in these days minimizes the disadvantage of PLL. In the case the FFH system is designed using the PLL, it is difficult to be satisfied of the design conditions such as RF badwidth and the settling time of PLL, and it has limitation because of complex circuit by using the balanced modulator. In this study, we evaluated the performance in order to design the FFH system using the DDS. The system that has the improvement of error rate, 1Mhps hopping rate and 5MHz RF bandwidth is designed and evaluated.

• Asia-Pacific Journal of Business
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• v.10 no.4
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• pp.49-63
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• 2019

The export regulation of semiconductor core materials, which began with the recent revision of the export management regulations of Japan, raises the need for a new cooperation network. A hierarchical management network that was effective in the fast-follower system requires organic cooperation between the public sector and industry through a multilateral network that emphasizes horizontal co-operation among innovation actors. This study focused on the relational capital that exists among members of a business association such as an association that has been relatively marginalized from previous studies. In addition, this study aimed to analyze the effect of network activity characteristics such as industry-university linkage and informal exchange on technological innovation. Through this, I would like to draw implications for enhancing the effectiveness of the government's R & D support and innovation performance of R & D companies. Based on the results of the SMEs R & D survey, this study found that relational capital, informal exchange had a positive effect on technological innovation performance. However, if the relational capital exceeds a certain level, it is analyzed that there is a negative effect due to group think and lock-in effect. This means that informal exchange channels should be expanded for innovation and enhancement, and relational capital should be managed in consideration of the negative effects that may occur when certain levels are exceeded.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.65-72
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• 2008

This paper proposes a new dual-loop digital PLL(DPLL) using seamless frequency tracking methods. The dual-loop construction, which is composed of the coarse and fine loop for fast locking time and a switching noise suppression, is used successive approximation register technique and TDC. The proposed DPLL in order to compensate the quality of jitter which follows long-term of input frequency is newly added cord conversion frequency tracking method. Also, this DPLL has VCO circuitry consisting of digitally controlled V-I converter and current-control oscillator (CCO) for robust jitter characteristics and wide lock range. The chip is fabricated with Dongbu HiTek $0.18-{\mu}m$ CMOS technology. Its operation range has the wide operation range of 0.4-2GHz and the area of $0.18mm^2$. It shows the peak-to-peak period jitter of 2 psec under no power noise and the power dissipation of 18mW at 2GHz through HSPICE simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.11
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• pp.5879-5884
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• 2013

With the rapid industrialization and economical development, the electricity demands of the industrial facilities and densely populated large cities are continuing to increase in Korea. The increase in the power consumption requires the extension of power facilities, but it is difficult to secure spaces for equipment installation in the limited space of urban areas. In addition, the 154 kV or 345 kV transmission systems in Korea has a short transmission distance, and are connected to one another in network structures that ensure the high reliability and stability of power supply. This structure reduces the impedance during the fault in power system, and increases the magnitude of in the short circuit fault current. The superconducting fault current limiter (SFCL) was devised to effectively address these existing problems. The SFCL is a new-concept eco-friendly protective device that ensures fast operation and recovery time for the fault current and does not need additional fault detection devices. Therefore, many studies are being conducted around the world. In this paper, based on the wiring method the initial fault current characteristics, current limiting characteristics, according to the incident angle and the change in inductance current limiting characteristics were analyzed in a multifaceted methods.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1264-1271
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• 2012

Fast tracking is important for high-speed data transmission in high-speed mobile environment such as high speed rail and vehicular. Digital retrodirective array antenna is possible to do automatically beam tracking because it can control the phase information of the output signal toward opposite direction to input signal without no a priori knowledge of the arrival direction. Also, Digital retrodirective array antennas has merit that it is easy to upgrade and modify compare with analogue retrodirective array antennas. In this paper, we analyze the BER performance of digital retrodirective array antenna under AWGN environment and multipath signal. Simulation results show correct phase estimation and conjugation of retrodirective array antenna by using phase detector block. Also, phase conjugation technique has better BER performance about 1 dB at source than that of without phase conjugation when phase lag is $15^{\circ}$ in AWGN environment. This paper also discusses effect of the presence of multipath signal. Phase and amplitude error about direction of direct signal occurs when retrodirective array system is affected by interference and multipath signal in the presence of multipath signal.

• Journal of the Korean Institute of Traditional Landscape Architecture
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• v.30 no.2
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• pp.101-109
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• 2012

Traditional village forests in Jeju Island represent unique cultural landscape with a history of more than several hundred years as a national cultural asset in Korea. In this paper, the characteristics and meaning of traditional village forests in Jeju Island was compared with the Dangsan and Bibo forests at inland. There are 368 Oreums, parasitic volcano, and 391 shrines of Dang(Divine place) in Jeju. Life, culture and tradition of rural villages are all connected with the Dang and Oreum in Jeju. It has been found from this study that the village in Jeju were established as a cultural landscape on the surface of natural landscape. The features of traditional villages focused on the Dang and Oreum in Jeju Island were similar to the Dangsan and Bibo forestsat inland villages. The Oreum represents mountain and the Pojedan forest is newly found in Sangmyung-ri. The seashore areas are covered by vaocanic rocks in Jeju and large scale windbreaks are hardly found. The stone tower at Sinheung-ri built for blocking sand movement represents Bibo forest. The special attribute of the Dang in Jeju is that it is close to real life and believers are still remain. In 2009, the Jeju Chilmeoridang Yeongdeunggut ritual was nominated as an Intangible Cultural Heritage of Humanity by UNESCO. The shrine of Dang, however, has been degraded fast by construction of seashore road and Jeju Olle trail path. As for the world cultural heritage discussed at international conferences, it is important that there is sustainability on the right to enjoy cultural heritage. Integrated efforts from local residents, local governments and national government are needed to set up a management scheme for the Dang culture. Rural villages in Jeju with the Dang and Oreum are expected to get an international attention as to have traditional cultural landscapes of Korea.