• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.723-727
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• 2004

A new high-performance and low cost single switch energy recovery display driver for an AC plasma display panel (PDP) is proposed. Since it is composed of only one auxiliary power switch, two small inductors, and eight diodes compared with the conventional circuit consisting of four auxiliary power switches, two small inductors, eight power diodes, and two external capacitors, it features a much simpler structure and lower cost. Nevertheless, since the rootmean-square (RMS) value of the inductor current is very small, it also has very desirable advantages such as n low conduction loss and high efficiency. Furthermore, there are no serious voltage-drops caused by the large gas-discharge current with the aid of the discharge current compensation, which can also greatly reduce the current flowing through power switches and maintain the panel to light at n lower sustaining voltage. In addition, all main power switches are turned on under the zero-voltage switching (ZVS) and thus, the proposed circuit has a improved EMI, increased reliability, and high efficiency. Therefore, the proposed circuit will be well suited to the wall hanging PDP TV. To confirm the validity of the proposed circuit, circuit operations, features,and design considerations are presented and verified experimentally on a 6-inch PDP, 50kHz-switching frequency, and sustaining voltage 141V based prototype.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.484-492
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• 2015

This paper proposes a PWM phase-shift circuit to make that the LED lighting system distributes the channel currents evenly for any number of LED strings by generating evenly phase-shifted PWM signals for multiple LED driver ICs. The evenly distributed channel currents reduce the peak current, the decoupling capacitor size, and EMI noise. The PWM phase-shift circuit makes an arbitrary degree of PWM phase-shift by using a resistor and a capacitor. It measures the RC delay once. It reduces the number of external resistors and capacitors by providing zero and 180 degree phase-shift modes requiring no resistor and capacitor. An LED driver IC with the PWM phase-shift circuit was fabricated with a $0.35{\mu}m$ BCDMOS process. The PWM phase-shift circuit receives a PWM signal of 50 Hz~20 kHz at $f_{CLK}=450kHz$ and it generates a $0{\sim}360^{\circ}$ phase-shifted PWM signal with $R=0{\sim}1.1M{\Omega}$ at C=1 nF and $f_{PWM}=1kHz$. The measured phase errors are 1.74~3.94% due to parasitic capacitances.

• Journal of IKEEE
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• v.13 no.3
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• pp.1-6
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• 2009

In this paper, the external matching circuits were designed in order to compensate the efficiency which decreases by human body effect in the internal antenna phone. Comparing the two types of matching circuit, we selected the structure to minimize the switch stress. RF MEMS switch using low voltage was compared with FET switch and measured the performance in the handset. Here, the detection circuit which can couple th reflection power from antenna was added in the handset and we set up the demonstration system that can compensate the loss of hand effect automatically. In this system, when hand effect occurred, the radiation power increased 2.5dB by operation the matching circuit.

• Smart Media Journal
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• v.12 no.1
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• pp.17-23
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• 2023

Design-For-Security (DFS) methodology is to protect integrated circuits from physical attacks, and that can be implemented by adding a security circuit to detect abnormal external access. Among the abnormal accesses called invasive attack, microprobing and FIB circuit editing are classified as the most powerful methods because they have direct access. Microprobing deliberately inject defects into the wire of circuit through probes, or reads and changes data. FIB circuit editing is methods of reconnecting or destroying circuits to neutralize security circuits or to access data. Previous DFS methodology have responded to the attacks by detecting arrival time asymmetry between the two signals or by comparing input/output data based on encrypted communication. This study conducted to reduce hardware overhead, and the proposed circuit detects the reflected signal asymmetry generated through probe or FIB circuit editing and detects the attacks through comparison. Since the proposed security circuit reduces the size and test cycle of the circuit compared to previous studies, the cost used for security can be reduced.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.473-476
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• 2004

AS supply voltage of DRAM is scaled down, voltage circuit that is stable from external noise is more important. $V_{PP}$ voltage is very important, it is biased to gate of memory cell transistor and possible to read and write without voltage down. It has both high pump gain and high power efficiency therefore charge pump circuit is proposed. The circuit is simulated by 0.18${\mu}m$ memory process and 1.2V supply voltage. Compare to CCTS, it is improved 0.43V of pump gain, $3.06\%$ of power efficiency at 6 stage.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1196-1198
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• 2005

This paper presents the realization of a four-terminal floating nullor (FTFN), which is simple configuration comprised three OTAs. The external bias currents of the OTAs can electronically adjust the current gain of the proposed FTFN. The realization method is suitable for implementation in monolithic integrated form. To demonstrate the circuit performances, the proposed FTFN was simulated by the use of the PSPICE analog simulation program and implemented using the commercially available OTAs. The simulation and experimental results verifying the performances of the proposed circuit are agreed with the theoretical values. Some application example in the design of the proposed FTFN as electronically tunable active element are also included.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.37-42
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• 2010

A novel hysteresis tunable monolithic comparator circuit based on a $0.35{\mu}m$ CMOS process is suggested, designed, fabricated, measured and analyzed in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.43-50
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• 2007

In a high-speed flash style or a pipelining style analog-to-digital converter (A/D converter), the DC reference fluctuation caused by external noises becomes serious, as the sampling frequency is increased. To reduce the fluctuations in conventional A/D converters, capacitors have been simply used, but the layout area was large. Instead of capacitors, a low-noise and small-size DC reference circuit based on transmission gate (TG) is proposed in this paper. In order to verify the proposed technique, we designed and manufactured a 6-bit 2GSPS CMOS A/D converter. The A/D converter is designed with a 0.18um 1-poly 6-metal n-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies the chip area of 977um by 1040um. The measured result shows that SNDR is 36.25 dB and INL/DNL is within 0.5LSB, even though the DC reference fluctuation is serious.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1491-1494
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• 2008

Typically internal mobile LCD display modules are connected to the mobile product baseband PCB with flexible printed circuit board equipped with board-to-board connector. This solution has a drawback of limiting the product concept work to certain solutions that are based on connector size, location, flexible PCB length, bending, etc. in the display module. Also flexible printed circuit board based solutions are not completely optimized from reliability point of view, causing flex circuit board breakings. For the external displays in the PC or Home entertainment market, the cable solution is too expensive and resource demanding. The wireless solution has obvious advantages over reliability, low cost and flexibility. This paper describes a wireless audio-visual interface solution.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.575-576
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• 2008

This paper presents a design of a charge pumping circuit for LCD Driver IC. The charge pumping circuit consists of a control block, a VCIOUT generating block, a DDVDH generating block, a VGH/VGL generating block, and VCL generating block. It generates various higher and lower voltage than supply voltage using external control input. Simulation results show that voltages of DDVDH, VGH, VGL, and VCL satisfy the target voltage, and the output DDVDH drives the output current 7mA.