Browse > Article

A Digitally Controllable Hysteresis CMOS Monolithic Comparator Circuit  

Kim, Young-Gi (Anyang University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.47, no.11, 2010 , pp. 37-42 More about this Journal
Abstract
A novel hysteresis tunable monolithic comparator circuit based on a $0.35{\mu}m$ CMOS process is suggested, designed, fabricated, measured and analyzed in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V.
Keywords
비교기;히스테리시스;알에프아이디 (스타일:Keywords내용);
Citations & Related Records
연도 인용수 순위
  • Reference
1 K. Udo and F. Martin, "Fully Integrated Passive UHF RFID Transponder IC With 16.7-W Minimum RF Input Power," IEEE JOURNAL OF SOLID-STATE CIRCUITS, NO. 10, VOL. 38, pp. 1602-1608, October 2003.   DOI   ScienceOn
2 G. Xiaofeng, L. Xinquan, L. Yushan, W. Jianping Z. Jie, "Design and application of the novel low-threshold comparator using hysteresis," in Proc. of 6th International Conference On ASIC Proceedings, pp. 549-553, Shanghai, China, October 2005.
3 H. W. Huang, C. H. Lin, K, H, Chen, " A programmable dual hysteretic window comparator," in Proc. of IEEE International Symposium on Circuits and Systems 2008, pp. 1930-1933, Seattle, U. S. A, May 2008.
4 P. E. Allen and D. R. Holberg, "CMOS Analog Circuit Design." 2nd Edition,Oxford University Press. 2002.