• Proceedings of the KIEE Conference
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• summer
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• pp.896-898
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• 2004

The lagging reactive power should be supplied for the excitation of isolated squirrel-cage induction generators by external circuit. This paper deals with a technique to drive the equations for analysis of the excitation characteristics and performance of an isolated squirrel-cage induction generator from the conventional equivalent circuit of induction machine, transform the equations into d-q coordinates to use vector control technique, and carry out the simulation of an induction generator system with various conditions using MATLAB. The results of the simulation indicate that moderate reactive power can be controlled effectively to maintain constant voltage over a wide range of the rotor speeds and loads.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1206-1208
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• 1993

This paper is to study and realize a measuring device for complex dielectric constants. The device is consisted in order of interface unit, external RAM, programmable counter, D/A converter, measuring circuit, Sample & Hold circuit, A/D converter and related control circuits. Various excitation waves are digitalized and sent to the 4096 static RAM by personal computer. These data saved in the RAM are converted to analog excitation waves through D/A converter. The frequency of excitation wave is depend on the read-out speed of the RAM according to clock pulses. Such generated waves are applied to dielectrics under test and their responses are sampled and converted to digital data through A/D converter. The computer takes the digital data and calculates finally the complex dielectric constants. The frequencies for Measurement ranges from 0.04 Hz to 10 kHz.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.3
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• pp.413-419
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• 1987

In this paper, self-oscillating mixer is designed by small signal S-parameter and series feedback circuit. The input-output matching circuit is accomplished from double stub and additional matching stub. The self-oscillating mixer is oscillating itself and amplifies without any external local oscillator and an intermediate frequency amplifier, so it has advantages in its economical and system simplification. The experimental results show the maximum conversion gain 1.5d B and the noise figure 6.5d B at RF center frequency 4GHz and IF 1.1GHz` output oscillating power 4d Bm, efficiency 13.4%, stability -10MHz/V and -0.5MHz/\ulcornerC at oscillating frequency 5.1GHz.The rejection band loss characteristics in band pass filter and low pass filter are -40d B and -30d B, respectively.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.22 no.9
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• pp.896-902
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• 2012

For most applications of the vibration energy harvesting technology as in wireless sensor networks for smart buildings and plants, the evaluation of DC output performance of vibration energy harvesters is typically required. However, there is no dedicated algorithm for the evaluation. The lack of a dedicated algorithm results from difficulties in the direct incorporation of nonlinear rectifying and regulating circuitry into finite element models of piezoelectric vibration energy harvesters. In this study, we develop a dedicated algorithm and present software based on it for the evaluation of not only AC but also DC electrical quantities. Here, an equivalent electrical circuit model is employed. The COMSOL multiphysics simulation tool is adopted for extracting equivalent electrical circuit parameters of a piezoelectric vibration energy harvester and MATLAB is used to make a graphical user interface. The AC voltage and power outputs calculated by the proposed algorithm under various conditions are compared with those by a traditional finite element analysis. The DC output voltage and power through a rectifier are obtained for varying values of smoothing capacitance and external resistance.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.2 no.2
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• pp.14-21
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• 2003

Rapid prototyping(RP) has been used for design verification and proto sample or mold manufacturing. Many RP systems have been introduced into the market during the past 15 years. However, until now, the systems have used mainly for external physical models (mono function), and have the basic but critical limitation of one material on one stage (mono material). To overcome the limitations of mono-material and mono-function of conventional. RP systems, the concept of Functional Phototype Development (FPD) is newly proposed in this paper FPD provides the necessary prototype functions such as mechanical, optical, chemical and electrical properties in order to meet the broad requirements of the industry. The paper illustrates the representative achievements of electronic components such as the multi-layer printed circuit board(MLB). Experimental results demonstrate that FPD has great potential applied to broad industrial uses and that It Will be a powerful tool in the neat future.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.471-477
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• 2014

In this paper, a modeling and co-simulation methodology is proposed to predict the radiated electromagnetic interference (EMI) from on-chip switching I/O buffers. The output waveforms of I/O buffers are simulated including the on-chip I/O buffer circuit and the RC extracted on-chip interconnect netlist, package, and printed circuit board (PCB). In order to accurately estimate the EMI, a full-wave 3D simulation is performed including the measurement environment. The simulation results are compared with near-field electromagnetic scan results and far-field measurements from an anechoic chamber, and the sources of emission peaks were analyzed. For accurate far-field EMI simulation, PCB power trace models considering IC switching current paths and external power cable models must be considered for accurate EMI prediction. With the proposed EMI simulation model and flow, the electromagnetic compatibility can be tested even before the IC is fabricated.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2173-2178
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• 2008

A doubly-fed induction generator(DFIG) system has been widely used in the modem wind turbines due to variable-speed operation, high efficiency and small converter size. It is well known that an inter-turn fault of a generator is very difficult to be detected. The DFIG system uses a wound rotor induction machine so that the magnetizing current of the generator can be fed from both the stator and the rotor. This paper proposes a protection algorithm for a DFIG using the d-q equivalent circuit in the time domain. In the case of a DFIG, the voltages and currents of the rotor side as well as the voltages and currents of the stator are available. The proposed algorithm estimates the instantaneous(i.e., converted into the stationary frame) induced voltages from the rotor and the stator sides. If the difference between the two estimated induced voltages exceeds the threshold, the proposed algorithm detects the inter-turn fault. The algorithm can detect a inter-turn fault of a winding. The performance of the proposed algorithm is validated using a PSCAD/EMTDC simulator under inter-turn fault conditions and normal operating conditions such as an external fault and the change of the wind speed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.980-986
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• 2002

In the fast data communication system, synchronized by a clock source, the loss of data will often occur due to several reasons as a differential routing path between data and clock, a differential propagation delay of components or an unstable phase of clock and data by external noise. In this paper, we describe the ASIC implementation of the data compensation circuit which can detect the data loss from above problems and recovery to original data with stable synchronization. Especially it supports a strong stability and a good BER in the communication system for fast data transfer as optic area. This circuit is implemented by Verilog HDL and available to the digital ASIC implementations related to fast data transfer.

• Journal of Power Electronics
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• v.14 no.3
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• pp.478-487
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• 2014

This study presents a new interleaved three-level zero-voltage switching (ZVS) converter for high-voltage and high-current applications. Two circuit cells are operated with interleaved pulse-width modulation in the proposed converter to reduce the current ripple at the input and output sides, as well as to decrease the current rating of output inductors for high-load-current applications. Each circuit cell includes one half-bridge converter and one three-level converter at the primary side. At the secondary side, the transformer windings of two converters are connected in series to reduce the size of the output inductor or switching current in the output capacitor. Based on the three-level circuit topology, the voltage stress of power switches is clamped at $V_{in}/2$. Thus, MOSFETs with 500 V voltage rating can be used at 800 V input voltage converters. The output capacitance of the power switch and the leakage inductance (or external inductance) are resonant at the transition interval. Therefore, power switches can be turned on under ZVS. Finally, experiments verify the effectiveness of the proposed converter.

• Journal of information and communication convergence engineering
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• v.20 no.2
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• pp.137-142
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• 2022

Monolithic three-dimensional (M3D) logics such as M3D-NAND, M3D-NOR, M3D-buffer, M3D 2×1 multiplexer, and M3D D flip-flop, consisting of modularized M3D inverters (M3D-INVs), have been proposed. In the previous M3D logic, each M3D logic had to be designed separately for a standard cell library. The proposed M3D logic is designed by placing modularized M3D-INVs and connecting interconnects such as metal lines or monolithic inter-tier-vias between M3D-INVs. The electrical characteristics of the previous and proposed M3D logics were simulated using the technology computer-aided design and Simulation Program with Integrated Circuit Emphasis with the extracted parameters of the previously developed LETI-UTSOI MOSFET model for n- and p-type MOSFETs and the extracted external capacitances. The area, propagation delay, falling/rising times, and dynamic power consumption of the proposed M3D logic are lower than those of previous versions. Despite the larger space and lower performance of the proposed M3D logic in comparison to the previous versions, it can be easily designed with a single modularized M3D-INV and without having to design all layouts of the logic gates separately.