Browse > Article
http://dx.doi.org/10.5573/JSTS.2014.14.4.471

EMI Prediction of Slew-Rate Controlled I/O Buffers by Full-Wave and Circuit Co-Simulation  

Kim, Namkyoung (Department of Semiconductor Systems Engineering, College of Information and Communication Engineering, Sungkyunkwan University)
Hwang, Jisoo (Department of Semiconductor Systems Engineering, College of Information and Communication Engineering, Sungkyunkwan University)
Kim, SoYoung (Department of Semiconductor Systems Engineering, College of Information and Communication Engineering, Sungkyunkwan University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.14, no.4, 2014 , pp. 471-477 More about this Journal
Abstract
In this paper, a modeling and co-simulation methodology is proposed to predict the radiated electromagnetic interference (EMI) from on-chip switching I/O buffers. The output waveforms of I/O buffers are simulated including the on-chip I/O buffer circuit and the RC extracted on-chip interconnect netlist, package, and printed circuit board (PCB). In order to accurately estimate the EMI, a full-wave 3D simulation is performed including the measurement environment. The simulation results are compared with near-field electromagnetic scan results and far-field measurements from an anechoic chamber, and the sources of emission peaks were analyzed. For accurate far-field EMI simulation, PCB power trace models considering IC switching current paths and external power cable models must be considered for accurate EMI prediction. With the proposed EMI simulation model and flow, the electromagnetic compatibility can be tested even before the IC is fabricated.
Keywords
I/O buffers; slew rate; EMI; near-field; far-field;
Citations & Related Records
연도 인용수 순위
  • Reference
1 CISPR 22, Information technology equipment - Radio disturbance characteristics - Limits and methods of measurement, Edition 5.2, Mar., 2006.
2 Michel Mardiguian, Controlling Radiated Emissions by Design, 2nd edition, Springer, 2001.
3 T. Sudo, et al, "Characterization of on-chip capacitance effects for I/O circuits and core circuits,"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging, pp.73-76, 2001.
4 Wei-Da Guo,et al, "An On-/Off-Chip Co-Design Methodology for Suppressing Radiated Emissions from the High-Definition DTV System,"Topical Meeting on Advanced Research in EMC of ICs, IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, pp.1064-1067, Apr. 2010.
5 A. Bhargava, et al, "EMI prediction in switched power supplies by full-wave and non-linear circuit co-simulation,"IEEE International Symposium on Electromagnetic Compatibility, pp.44-46, Aug. 2009.
6 SangKeun Kwak, Jeongmin Jo and SoYoung Kim,"Modeling and Co-Simulation of I/O Interconnects for On-Chip and Off-Chip EMI Prediction," IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, pp.821-824, May, 2012.
7 Namkyoung Kim, et al, "EMI prediction in slew ratecontrolled switching I/O buffers", IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, pp.181-184, May 2013
8 HSPICE, Synopsys Inc
9 Calibre, Mentor Graphics
10 SIwave, Ansys Inc.
11 Cheng-Chang Chen, et al, "A Study of PCB EMI Measurement and Simulation,"IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, pp.736-739, Apr. 2010.
12 N. Delorme, M. Belleville, and J. Chilo, "Inductance and Capacitance Analytic Formulas for VLSI Interconnects," Electronics Letters, 23rd, Vol.32, No.11, May 1996.
13 CST Microwave Studio, Computer Simulation Technology